Datasheet AD9266-EP (Analog Devices)

FabricanteAnalog Devices
Descripción16-Bit, 20/40/65/80 MSPS, 1.8 V Analog-to-Digital Converter
Páginas / Página12 / 1 — 16-Bit, 65 MSPS,. 1.8 V Analog-to-Digital Converter. Enhanced Product. …
RevisiónB
Formato / tamaño de archivoPDF / 241 Kb
Idioma del documentoInglés

16-Bit, 65 MSPS,. 1.8 V Analog-to-Digital Converter. Enhanced Product. AD9266-EP. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet AD9266-EP Analog Devices, Revisión: B

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16-Bit, 65 MSPS, 1.8 V Analog-to-Digital Converter Enhanced Product AD9266-EP FEATURES FUNCTIONAL BLOCK DIAGRAM 1.8 V analog supply operation AVDD AGND SDIO SCLK CSB DRVDD 1.8 V to 3.3 V output supply RBIAS SNR SPI AD9266-EP VCM 77.6 dBFS at 9.7 MHz input OR R 76.4 dBFS at 70 MHz input FFE VIN+ PROGRAMMING DATA D15_D14 S U ADC O SFDR 8 CORE T B VIN– CM U D1_D0 94 dBc at 9.7 MHz input TP OU 93 dBc at 70 MHz input DCO VREF Low power SENSE 111 mW at 65 MSPS REF Differential input with 700 MHz bandwidth SELECT On-chip voltage reference and sample-and-hold circuit DIVIDE DUTY CYCLE MODE 2 V p-p differential analog input 1 TO 8 STABILIZER CONTROLS
001
DNL = −0.5/+1.0 LSB CLK+ CLK– PDWN DFS MODE
10476-
Interleaved data output for reduced pin-count interface
Figure 1.
Serial port control options Offset binary, Gray code, or twos complement data format PRODUCT HIGHLIGHTS Optional clock duty cycle stabilizer
1. The AD9266-EP operates from a single 1.8 V analog power
Integer 1 to 8 input clock divider
supply and features a separate digital output driver supply
Built-in selectable digital test pattern generation
to accommodate 1.8 V to 3.3 V logic families.
Energy-saving power-down modes
2. The sample-and-hold circuit maintains excel ent performance
Data clock output (DCO) with programmable clock and
at high input frequencies and is designed for low cost, low
data alignment
power, and ease of use.
ENHANCED PRODUCT FEATURES
3. A standard serial port interface supports various product features and functions, such as data output formatting,
Supports defense and aerospace applications (AQEC standard)
internal clock divider, power-down, DCO and data output
Military temperature range (−55°C to +125°C)
(D15_D14 to D1_D0) timing and offset adjustments, and
Controlled manufacturing baseline
voltage reference modes.
Enhanced product change notification
4. The AD9266-EP is packaged in a 32-lead RoHS-compliant
Qualification data available on request
LFCSP that is pin compatible with the AD9609 10-bit
APPLICATIONS
ADC, the AD9629 12-bit ADC, and the AD9649 14-bit
Communications
ADC, enabling a simple migration path between 10-bit and
Diversity radio systems
16-bit converters sampling at 65 MSPS.
Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Handheld scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imaging Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2012–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS ORDERING GUIDE