Datasheet AD8331, AD8332, AD8334 (Analog Devices) - 49

Data Sheet AD8331/AD8332/AD8334 EVALUATION BOARD SCHEMATICS INH1 +5V +5V + 5V G ND1 G ND2 G ND3 G ND4 G ND5 G ND6 L9 R49 120 nH 4. 02k + Ω LO11 C14 L5 RX1 2 10 µF 120 nH L1 1 EN 12 100 R111 Ω R101 120 nH P IN1 EN34 M ICR1 C17 L CFB1 E E RFB1 0.1 µF C RX2 18 nF 1 2 C5 7 F F F 2 VO 1 274 6 µ µ C57 100 Ω 8 n Ω 0.1 µF C .1 C 1 53 .1 D D 0.1 µF CR1 C6 C16 0 C 0 L10 C1 22 pF 0.1 µF C59 120 nH 0.1 µF 0.1 µF 3 L12 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 120 nH FB 2 1 1 1 1 1 1 1 1 2 2 2 4 1 2 C7 +5V L7 CFB2 C8 M M H D NC N P S 1 1 1 3 0.1 µF IP IN P N M M N C75 INH2 O O M O 120 nH 18 nF 22 pF IN O V V IN M E C C E 1 C C L L L VP A V V 48 0.1 µF INH2 L G COM12 C 2 47 IN2 L11 ICR2 LMD2 VOH1 RFB2 120 nH 274 C2 3 46 Ω 1 2 NC VOL1 0.1 µF R141 RX3 0Ω 4 45 100Ω CR2 LO N2 VPSV2 LO21 5 44 3 LO P2 VOL2 RX4 VO2 R151 C22 C21 6 43 100Ω 0Ω 0.1 µF 0.1 µF VIP2 VOH2 L2 C69 7 42 L13 +5V VIN2 COM12 120 nH 0.1 µF 120 nH +5V 8 D VPS2 AD8334 MODE 41 L3 SLO PE 9 120 nH +5V VPS3 L14 U NC3 40 120 nH C71 10 0.1 µF VIN3 39 C26 COMM34 RX5 11 0.1 µF VIP3 38 100Ω C27 VOH3 R181 0.1 µF 12 LO31 LO P3 37 VOL3 VO 3 13 LON3 36 RX6 VPS34 R191 RFB3 14 100Ω 274 NC 35 Ω VOL4 C9 CFB3 15 L15 L6 LMD3 34 0.1 µF 120 nH INH3 120 nH 18 nF VOH4 16 4 INH3 4 3 3 4 3 P 4 COM34 33 4 C10 4 3 4 L34 M M 4 D 4 N P 4 4 IN M O M S M 3 22 pF 120 nH ICR3 IN3 C3 O O H M A L O O IP IN IL C C C C C IN L NC L L V V VP G C H V V N +5V 0.1µF 1 2 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 C77 F F 3 µ 0 F µ F 0.1 µF 8 n 4 µ C62 C4 1 .1 55 C 1 .1 C12 6 C 0 .1 L16 0.1 µF C 0 0.1 µF C 0 120 nH 22 pF C31 3 CR3 0.1 µF RFB4 RX7 C11 CFB4 274Ω HI 100Ω 18 nF +5V 0.1 µF C32 I N4 0.1 µF HIL O 4 VO 4 L4 CLMP34 LO ICR4 IN3 RX8 L8 120 nH A R231 R221 100Ω 120 nH G 1 2 R50 4.02kΩ +5V L17 120 nH LO41 3 CR4 NOTES 1 COMPONENTS IN GRAY ARE OPTIONAL USER SUPPLIED.
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2 NC = NO CONNECT.
03199- Figure 115. AD8334-EVALZ Schematic Rev. I | Page 49 of 55 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS MEASUREMENT CONSIDERATIONS THEORY OF OPERATION OVERVIEW LOW NOISE AMPLIFIER (LNA) Active Impedance Matching LNA Noise VARIABLE GAIN AMPLIFIER X-AMP VGA Gain Control VGA Noise Common-Mode Biasing POSTAMPLIFIER Noise Output Clamping APPLICATIONS INFORMATION LNA—EXTERNAL COMPONENTS Gain Input VCM Input Logic Inputs—ENB, MODE, and HILO Optional Output Voltage Limiting Output Decoupling DRIVING ADCs OVERLOAD OPTIONAL INPUT OVERLOAD PROTECTION LAYOUT, GROUNDING, AND BYPASSING MULTIPLE INPUT MATCHING DISABLING THE LNA ULTRASOUND TGC APPLICATION HIGH DENSITY QUAD LAYOUT AD8331 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT AD8331 EVALUATION BOARD SCHEMATICS AD8331 EVALUATION BOARD PCB LAYERS AD8332 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8332 EVALUATION BOARD PCB LAYERS AD8334 EVALUATION BOARD GENERAL DESCRIPTION CONFIGURING THE INPUT IMPEDANCE Driving the VGA from an External Source or Using the LNA to Drive an External Load Using the Clamp Circuit Viewing Signals MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8334 EVALUATION BOARD PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE