Datasheet RX65N, RX651 Groups (Renesas) - 10
| Fabricante | Renesas |
| Descripción | 120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 2-MB flash memory |
| Páginas / Página | 246 / 10 — Table 1.1. Outline of Specifications (9/10). Classification. … |
| Formato / tamaño de archivo | PDF / 2.8 Mb |
| Idioma del documento | Inglés |
Table 1.1. Outline of Specifications (9/10). Classification. Module/Function. Description
Línea de modelo para esta hoja de datos
Versión de texto del documento
RX65N Group, RX651 Group 1. Overview
Table 1.1 Outline of Specifications (9/10) Classification Module/Function Description
12-bit A/D converter (S12ADFa) 12 bits × 2 units (unit 0: 8 channels; unit 1: 21 channels) 12-bit resolution (switchable between 8, 10, and 12 bits) Conversion time 0.48 μs per channel (for 12-bit conversion) 0.45 μs per channel (for 10-bit conversion) 0.42 μs per channel (for 8-bit conversion) Operating mode Scan mode (single scan mode, continuous scan mode, or 3 group scan mode) Group priority control (only for 3 group scan mode) Sample-and-hold function Common sample-and-hold circuit included In addition, channel-dedicated sample-and-hold function (3 channels: in unit 0 only) included Sampling variable Sampling time can be set up for each channel. Digital comparison Method: Comparison to detect voltages above or below thresholds and window comparison Measurement: Comparison of two results of conversion or comparison of a value in the comparison register and a result of conversion Self-diagnostic function The self-diagnostic function internally generates three analog input voltages (unit 0: VREFL0, VREFH0 × 1/2, VREFH0; unit 1: AVSS1, AVCC1 × 1/2, AVCC1) Double trigger mode (A/D conversion data duplicated) Detection of analog input disconnection Three ways to start A/D conversion Software trigger, timer (MTU3, TMR, TPU) trigger, external trigger Event linking by the ELC 12-bit D/A converter (R12DA) 2 channels 12-bit resolution Output voltage: 0.2 V to AVCC1 – 0.2 V (buffered output), 0 V to AVCC1 (unbuffered output) Buffered output or unbuffered output can be selected. Event linking by the ELC Temperature sensor 1 channel Relative precision: ± 1°C The voltage of the temperature is converted into a digital value by the 12-bit A/D converter (unit 1). Safety Memory protection unit Protection area: Eight areas (max.) can be specified in the range from 0000 0000h to (MPU) FFFF FFFFh. Minimum protection unit: 16 bytes Reading from, writing to, and enabling the execution access can be specified for each area. An access exception occurs when the detected access is not in the permitted area. Trusted Memory (TM) Programs in the TM target area in the code flash memory are protected against reading Function Instruction fetching by the CPU is the only form of access to these areas when the TM function is enabled. Register write protection Protects important registers from being overwritten for in case a program runs out of function control. CRC calculator (CRCA) Generation of CRC codes for 8-/32-bit data 8-bit data Selectable from the following three polynomials X8 + X2 + X + 1, X16 + X15 + X2 + 1, X16 + X12 + X5 + 1 32-bit data Selectable from the following two polynomials X32 + X26 + X23 + X22 + X16+ X12 + X11 + X10 + X8+ X7 + X5 + X4 + X2+ X + 1, X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 + X9 + X8 + X6 + 1 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable Main clock oscillation Main clock oscillation stop detection: Available stop detection R01DS0276EJ0230 Rev.2.30 Page 10 of 246 Jun 20, 2019 Document Outline Features 1. Overview 1.1 Outline of Specifications 1.2 List of Products 1.3 Block Diagram 1.4 Pin Functions 1.5 Pin Assignments 2. CPU 2.1 General-Purpose Registers (R0 to R15) 2.2 Control Registers 2.3 Accumulator 3. Address Space 3.1 Address Space 3.2 External Address Space 4. I/O Registers 4.1 I/O Register Addresses (Address Order) 5. Electrical Characteristics 5.1 Absolute Maximum Ratings 5.2 DC Characteristics 5.3 AC Characteristics 5.3.1 Reset Timing 5.3.2 Clock Timing 5.3.3 Timing of Recovery from Low Power Consumption Modes 5.3.4 Control Signal Timing 5.3.5 Bus Timing 5.3.6 EXDMAC Timing 5.3.7 Timing of On-Chip Peripheral Modules 5.4 USB Characteristics 5.5 A/D Conversion Characteristics 5.6 D/A Conversion Characteristics 5.7 Temperature Sensor Characteristics 5.8 Power-on Reset Circuit and Voltage Detection Circuit Characteristics 5.9 Oscillation Stop Detection Timing 5.10 Battery Backup Function Characteristics 5.11 Flash Memory Characteristics 5.12 Boundary Scan Appendix 1. Package Dimensions REVISION HISTORY General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products Notice
Table 1.1 Outline of Specifications (9/10) Classification Module/Function Description
12-bit A/D converter (S12ADFa) 12 bits × 2 units (unit 0: 8 channels; unit 1: 21 channels) 12-bit resolution (switchable between 8, 10, and 12 bits) Conversion time 0.48 μs per channel (for 12-bit conversion) 0.45 μs per channel (for 10-bit conversion) 0.42 μs per channel (for 8-bit conversion) Operating mode Scan mode (single scan mode, continuous scan mode, or 3 group scan mode) Group priority control (only for 3 group scan mode) Sample-and-hold function Common sample-and-hold circuit included In addition, channel-dedicated sample-and-hold function (3 channels: in unit 0 only) included Sampling variable Sampling time can be set up for each channel. Digital comparison Method: Comparison to detect voltages above or below thresholds and window comparison Measurement: Comparison of two results of conversion or comparison of a value in the comparison register and a result of conversion Self-diagnostic function The self-diagnostic function internally generates three analog input voltages (unit 0: VREFL0, VREFH0 × 1/2, VREFH0; unit 1: AVSS1, AVCC1 × 1/2, AVCC1) Double trigger mode (A/D conversion data duplicated) Detection of analog input disconnection Three ways to start A/D conversion Software trigger, timer (MTU3, TMR, TPU) trigger, external trigger Event linking by the ELC 12-bit D/A converter (R12DA) 2 channels 12-bit resolution Output voltage: 0.2 V to AVCC1 – 0.2 V (buffered output), 0 V to AVCC1 (unbuffered output) Buffered output or unbuffered output can be selected. Event linking by the ELC Temperature sensor 1 channel Relative precision: ± 1°C The voltage of the temperature is converted into a digital value by the 12-bit A/D converter (unit 1). Safety Memory protection unit Protection area: Eight areas (max.) can be specified in the range from 0000 0000h to (MPU) FFFF FFFFh. Minimum protection unit: 16 bytes Reading from, writing to, and enabling the execution access can be specified for each area. An access exception occurs when the detected access is not in the permitted area. Trusted Memory (TM) Programs in the TM target area in the code flash memory are protected against reading Function Instruction fetching by the CPU is the only form of access to these areas when the TM function is enabled. Register write protection Protects important registers from being overwritten for in case a program runs out of function control. CRC calculator (CRCA) Generation of CRC codes for 8-/32-bit data 8-bit data Selectable from the following three polynomials X8 + X2 + X + 1, X16 + X15 + X2 + 1, X16 + X12 + X5 + 1 32-bit data Selectable from the following two polynomials X32 + X26 + X23 + X22 + X16+ X12 + X11 + X10 + X8+ X7 + X5 + X4 + X2+ X + 1, X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 + X9 + X8 + X6 + 1 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable Main clock oscillation Main clock oscillation stop detection: Available stop detection R01DS0276EJ0230 Rev.2.30 Page 10 of 246 Jun 20, 2019 Document Outline Features 1. Overview 1.1 Outline of Specifications 1.2 List of Products 1.3 Block Diagram 1.4 Pin Functions 1.5 Pin Assignments 2. CPU 2.1 General-Purpose Registers (R0 to R15) 2.2 Control Registers 2.3 Accumulator 3. Address Space 3.1 Address Space 3.2 External Address Space 4. I/O Registers 4.1 I/O Register Addresses (Address Order) 5. Electrical Characteristics 5.1 Absolute Maximum Ratings 5.2 DC Characteristics 5.3 AC Characteristics 5.3.1 Reset Timing 5.3.2 Clock Timing 5.3.3 Timing of Recovery from Low Power Consumption Modes 5.3.4 Control Signal Timing 5.3.5 Bus Timing 5.3.6 EXDMAC Timing 5.3.7 Timing of On-Chip Peripheral Modules 5.4 USB Characteristics 5.5 A/D Conversion Characteristics 5.6 D/A Conversion Characteristics 5.7 Temperature Sensor Characteristics 5.8 Power-on Reset Circuit and Voltage Detection Circuit Characteristics 5.9 Oscillation Stop Detection Timing 5.10 Battery Backup Function Characteristics 5.11 Flash Memory Characteristics 5.12 Boundary Scan Appendix 1. Package Dimensions REVISION HISTORY General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products Notice