Datasheet VCNL3040 (Vishay) - 8

VCNL3040
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Function Description
VCNL3040 supports different kinds of mechanical designs to achieve the best proximity detection performance for any color of object with more flexibility. The basic PS function settings, such as duty ratio, integration time, interrupt, and PS enable / disable and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS response time. Integration time represents the duration of the energy being received. The Interrupt is asserted when the PS detection levels over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the Interrupt function is enabled, the host reads the PS output data from VCNL3040 that saves host loading from periodically reading PS data. Additionally, the INT flag (register: INT_Flag) indicates the behavior of INT triggered under different conditions. PS persistence (PS_PERS) sets up the PS INT asserted conditions as long as the PS output value continually exceeds the threshold level. The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon. VCNL3040 also supports an easy use of proximity detection logic output mode that outputs just high / low levels saving loading from the host. Normal operation mode or proximity detection logic output mode can be selected on the register: PS_MS. A smart persistence is provided to get faster PS response time and prevent false trigger for PS. Descriptions of each slave address operation are shown in table 1.
TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION COMMAND DATE BYTE REGISTER DEFAULT R / W FUNCTION DESCRIPTION CODE LOW / HIGH NAME VALUE
L Reserved R / W 0x01 Reserved 0x00 H Reserved - 0x00 Reserved L Reserved - 0x00 Reserved 0x01 H Reserved - 0x00 Reserved L Reserved - 0x00 Reserved 0x02 H Reserved - 0x00 Reserved L PS_CONF1 R/W 0x03 PS duty ratio, integration time, persistence, and PS enable/disable 0x03 H PS_CONF2 R/W 0x00 PS gain, PS output resolution selection, PS interrupt trigger method L PS_CONF3 R/W 0x00 PS multi pulse, active force mode, sunlight immunity setting 0x04 H PS_MS R/W 0x00 PS mode selection, PS protection setting and IRED current selection L PS_CANC_L R/W 0x00 PS cancellation level setting 0x05 H PS_CANC_M R/W 0x00 PS cancellation level setting L PS_THDL_L R/W 0x00 PS low interrupt threshold setting LSB byte 0x06 H PS_THDL_M R/W 0x00 PS low interrupt threshold setting MSB byte L PS_THDH_L R/W 0x00 PS high interrupt threshold setting LSB byte 0x07 H PS_THDH_M R/W 0x00 PS high interrupt threshold setting MSB byte L PS_Data_L R 0x00 PS LSB output data 0x08 H PS_Data_M R 0x00 PS MSB output data L Reserved - 0x00 Reserved 0x09 H Reserved - 0x00 Reserved L Reserved - 0x00 Reserved 0x0A H Reserved - 0x00 Reserved L Reserved - 0x00 Reserved 0x0B H INT_Flag R 0x00 PS interrupt flags L ID_L R 0x86 Device ID LSB 0x0C H ID_M R 0x01 Device ID MSB
Note
• All of the reserved registers are used for internal test, please keep as default setting Rev. 1.2, 08-Jul-2019
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