Datasheet P9222-R (IDT) - 6

FabricanteIDT
DescripciónWireless Power Receiver for Low Power Applications
Páginas / Página52 / 6 — P9222-R Datasheet. Table 15. Interrupt Clear Registers, INT_Clear_L …
Revisión20190927
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P9222-R Datasheet. Table 15. Interrupt Clear Registers, INT_Clear_L (0x3A), INT_Clear_H (0x3B) .40

P9222-R Datasheet Table 15 Interrupt Clear Registers, INT_Clear_L (0x3A), INT_Clear_H (0x3B) .40

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P9222-R Datasheet
Table 15. Interrupt Clear Registers, INT_Clear_L (0x3A), INT_Clear_H (0x3B) .40
Table 16. Vout Set Register, Vout_Set (0x3C) .41
Table 17. ILIM Set Register, ILIM_Set (0x3D) .41
Table 18. Battery Charge Status Register, CHG_Status (0x3E)[a].41
Table 19. End of Power Transfer Register, EPT (0x3F)[a] .42
Table 20. Vrect ADC Value Registers, ADC_Vrect_L (0x40), ADC_Vrect_H (0x41) .42
Table 21. Vout ADC Value Registers, ADC_Vout_L (0x42), ADC_Vout_H (0x43) .42
Table 22. Iout Value Registers, Iout_L (0x44), Iout_H (0x45) .42
Table 23. Operating Frequency Registers, Op_Freq_L (0x48), Op_Freq_H (0x49) (RX Only) .42
Table 24. System Operating Mode Register, Sys_Op_Mode (0x4C) .43
Table 25. (AP to P9222-R) Command Register, COM (0x4E) .43
Table 26. Die Temperature ADC Value Registers, ADC_Die_Temp_L (0x66), ADC_Die_Temp_H (0x67).44
Table 27. Overvoltage Protection Set Register (0xB3, 8-bit) .44
Table 28. ASK Modulation Depth Register (0xB2, 16-bit) .44
Table 29. Foreign Object Detection Registers, FOD (0x70-0x7E)[a] .45
Table 30. ADC Result Register (0xD4, 16-bit, OD2 in Default Config) .45
Table 31. ADC Result Register (0xD6, 16-bit, GP1 in Default Config) .46
Table 32. ADC Result Register (0xD8, 16-bit, GP2 in Default Config) .46
Table 33. ADC Result Register (0xDA, 16-bit, Die Temperature in Default Config) .46
Table 34. External Thermistor Voltage on GP0 (0xB0, 16-bit) .46
Table 35. VRECT Target Register (0x90, 16-bit).46
Table 36. VRECT Knee Register (0x92, 8-bit) .47
Table 37. VRECT Correction Factor Register (0x93, 8-bit) .47
Table 38. VRECT Maximum Correction Register (0x94, 16-bit) .47
Table 39. VRECT Minimum Correction Register (0x96, 16-bit) .47 © 2019 Integrated Device Technology, Inc. 6 September 27, 2019