Datasheet ADP5076 (Analog Devices) - 3

FabricanteAnalog Devices
Descripción2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs
Páginas / Página23 / 3 — Data Sheet. ADP5076. SPECIFICATIONS. Table 2. Parameter Symbol. Min. Typ. …
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Data Sheet. ADP5076. SPECIFICATIONS. Table 2. Parameter Symbol. Min. Typ. Max. Unit. Test. Conditions/Comments

Data Sheet ADP5076 SPECIFICATIONS Table 2 Parameter Symbol Min Typ Max Unit Test Conditions/Comments

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Data Sheet ADP5076 SPECIFICATIONS
PVIN = AVIN = +2.85 V to +5.5 V, adjustable positive output voltage (VPOS) = +15 V, adjustable negative output voltage (VNEG) = −15 V, switching frequency (fSW) = 1200 kHz, junction temperature (TJ) = −40°C to +125°C for minimum and maximum specifications, and ambient temperature (TA) = +25°C for typical specifications, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE VIN 2.85 5.5 V PVIN pin, AVIN pin QUIESCENT CURRENT Operating Quiescent Current Sum of PVIN and AVIN IQ 3.5 4.0 mA No switching, EN1 pin = EN2 pin = high Standby Current ISTNDBY 2.05 2.2 mA No switching, EN1 pin = EN2 pin = low UVLO System UVLO Threshold AVIN pin Rising VUVLO_RISING 2.8 2.85 V Falling VUVLO_FALLING 2.5 2.55 V Hysteresis VHYS_1 0.25 V OSCILLATOR CIRCUIT Switching Frequency fSW 1.130 1.200 1.270 MHz SYNC pin = low 2.240 2.400 2.560 MHz SYNC pin = high (connect to AVIN pin) SYNC Input Input Clock Range fSYNC 1.000 2.600 MHz Input Clock Minimum On Pulse Width tSYNC_MIN_ON 100 ns Input Clock Minimum Off Pulse Width tSYNC_MIN_OFF 100 ns Input Clock High Logic VH (SYNC) 1.3 V Input Clock Low Logic VL (SYNC) 0.4 V PRECISION ENABLING (EN1, EN2) High Level Threshold VTH_H 1.125 1.15 1.175 V Low Level Threshold VTH_L 1.025 1.05 1.075 V Shutdown Mode VTH_S 0.4 V Internal circuitry disabled to achieve ISTNDBY Pull-Down Resistance REN 1.48 MΩ BOOST REGULATOR Adjustable Positive Output Voltage VPOS 35 V Feedback Voltage VFB1 0.8 V Feedback Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Bias Current IFB1 0.1 μA Overvoltage Protection Threshold VOV1 0.86 V At FB1 pin Load Regulation (∆V 1 FB1/VFB1)/ΔILOAD1 0.0003 %/mA ILOAD1 = 5 mA to 150 mA Line Regulation (∆VFB1/VFB1)/ΔVPVIN 0.002 %/V ILOAD1 = 50 mA Error Amplifier (EA) Transconductance GM1 260 300 340 μA/V Power Field Effect Transistor (FET) On RDS (ON) BOOST 175 mΩ Resistance Power FET Maximum Drain Source VDS (MAX) BOOST 39 V Voltage Current-Limit Threshold, Main Switch ILIM (BOOST) 2.0 2.2 2.4 A Minimum On Time 50 ns Minimum Off Time 25 ns Rev. A | Page 3 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PULSE WIDTH MODULATION (PWM) MODE PULSE SKIP MODULATION MODE UVLO OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATOR PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN STARTUP SEQUENCE APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITORS Input Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE