Datasheet AD73322 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Low Cost, Low Power CMOS General-Purpose Dual Analog Front End |
| Páginas / Página | 43 / 7 — AD73322. AD73322A. Parameter. Min. Typ. Max. Units. Test … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 396 Kb |
| Idioma del documento | Inglés |
AD73322. AD73322A. Parameter. Min. Typ. Max. Units. Test Conditions/Comments. Table II. Current Summary (AVDD = DVDD = +5.5 V). Analog
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AD73322 AD73322A Parameter Min Typ Max Units Test Conditions/Comments
LOGIC INPUTS VINH, Input High Voltage DVDD – 0.8 DVDD V VINL, Input Low Voltage 0 0.8 V IIH, Input Current ±0.5 µA CIN, Input Capacitance 10 pF LOGIC OUTPUT VOH, Output High Voltage DVDD – 0.4 DVDD V |IOUT| ≤ 100 µA VOL, Output Low Voltage 0 0.4 V |IOUT| ≤ 100 µA Three-State Leakage Current ±0.3 µA POWER SUPPLIES AVDD1, AVDD2 4.5 5.5 V DVDD 4.5 5.5 V I 10 DD See Table II NOTES 1Operating temperature range is as follows: –40°C to +85°C. Therefore, TMIN = –40°C and TMAX = +85°C. 2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise stated). 3At input to sigma-delta modulator of ADC. 4Guaranteed by design. 5Overall group delay will be affected by the sample rate and the external digital filtering. 6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (3.3 × 1011)/DMCLK. 7Between VOUTP and VOUTN. 8At VOUT output. 9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier bypassed and input gain of 0 dB. 10Test conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs. Specifications subject to change without notice.
Table II. Current Summary (AVDD = DVDD = +5.5 V) Analog Digital Total Current MCLK Conditions Current Current (Typ) SE ON Comments
ADCs On Only 7.5 9 16.5 1 YES REFOUT Disabled DACs On Only 16 9 25 1 YES REFOUT Disabled ADC and DAC On 20.5 10 30.5 1 YES REFOUT Disabled ADCs and DACs and Input Amps On 27 10 37 1 YES REFOUT Disabled ADCs and DACs and AGT On 25 10 35 1 YES REFOUT Disabled All Sections On 35 10 45 1 YES REFCAP On Only 0.8 0 0.8 0 NO REFOUT Disabled REFCAP and REFOUT On Only 3.5 0 3.5 0 NO All Sections Off 0 3 3 0 YES MCLK Active Levels Equal to 0 V and DVDD All Sections Off 0 10 µA 10 µA 0 NO Digital Inputs Static and Equal to 0 V or DVDD The above values are in mA and are typical values unless otherwise noted. REV. B –7–
LOGIC INPUTS VINH, Input High Voltage DVDD – 0.8 DVDD V VINL, Input Low Voltage 0 0.8 V IIH, Input Current ±0.5 µA CIN, Input Capacitance 10 pF LOGIC OUTPUT VOH, Output High Voltage DVDD – 0.4 DVDD V |IOUT| ≤ 100 µA VOL, Output Low Voltage 0 0.4 V |IOUT| ≤ 100 µA Three-State Leakage Current ±0.3 µA POWER SUPPLIES AVDD1, AVDD2 4.5 5.5 V DVDD 4.5 5.5 V I 10 DD See Table II NOTES 1Operating temperature range is as follows: –40°C to +85°C. Therefore, TMIN = –40°C and TMAX = +85°C. 2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise stated). 3At input to sigma-delta modulator of ADC. 4Guaranteed by design. 5Overall group delay will be affected by the sample rate and the external digital filtering. 6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (3.3 × 1011)/DMCLK. 7Between VOUTP and VOUTN. 8At VOUT output. 9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier bypassed and input gain of 0 dB. 10Test conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs. Specifications subject to change without notice.
Table II. Current Summary (AVDD = DVDD = +5.5 V) Analog Digital Total Current MCLK Conditions Current Current (Typ) SE ON Comments
ADCs On Only 7.5 9 16.5 1 YES REFOUT Disabled DACs On Only 16 9 25 1 YES REFOUT Disabled ADC and DAC On 20.5 10 30.5 1 YES REFOUT Disabled ADCs and DACs and Input Amps On 27 10 37 1 YES REFOUT Disabled ADCs and DACs and AGT On 25 10 35 1 YES REFOUT Disabled All Sections On 35 10 45 1 YES REFCAP On Only 0.8 0 0.8 0 NO REFOUT Disabled REFCAP and REFOUT On Only 3.5 0 3.5 0 NO All Sections Off 0 3 3 0 YES MCLK Active Levels Equal to 0 V and DVDD All Sections Off 0 10 µA 10 µA 0 NO Digital Inputs Static and Equal to 0 V or DVDD The above values are in mA and are typical values unless otherwise noted. REV. B –7–