Datasheet LT3755, LT3755-1, LT3755-2 (Analog Devices) - 16

FabricanteAnalog Devices
Descripción40VIN, 75VOUT LED Controllers
Páginas / Página28 / 16 — APPLICATIONS INFORMATION. Open LED Detection (LT3755 and LT3755-2). Input …
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APPLICATIONS INFORMATION. Open LED Detection (LT3755 and LT3755-2). Input Capacitor Selection

APPLICATIONS INFORMATION Open LED Detection (LT3755 and LT3755-2) Input Capacitor Selection

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LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
important when operating at high ambient temperatures. Driving SYNC with a 50% duty cycle waveform is always The majority of the power dissipation in the IC comes from a good choice, otherwise, maintain the duty cycle between the supply current needed to drive the gate capacitance of 20% and 60%. When using both PWM and SYNC features, the external power MOSFET. This gate drive current can the PWM signal rising edge should occur at least 200ns be calculated as: before the SYNC rising edge (VIH) for optimal PWM I performance. If the SYNC pin is not used, it should be GATE = fSW • QG connected to GND. A low QG power MOSFET should always be used when op- erating at high input voltages, and the switching frequency
Open LED Detection (LT3755 and LT3755-2)
should also be chosen carefully to ensure that the IC does The LT3755 and LT3755-2 provide an open-drain status not exceed a safe junction temperature. The internal junc- pin, OPENLED, that pulls low when the FB pin is within tion temperature of the IC can be estimated by: ~50mV of its 1.25V regulated voltage. If the open LED TJ = TA + [VIN (IQ + fSW • QG) • θJA] clamp voltage is programmed correctly using the FB pin, where T then the FB pin should never exceed 1.1V when LEDs are A is the ambient temperature, IQ is the quiescent current of the part (maximum 1.7mA) and connected, therefore, the only way for the FB pin to be within θJA is the package thermal impedance (68°C/W for the 3mm 50mV of the regulation voltage is for an open LED event to × 3mm QFN package). For example, an application with T have occurred. The key difference between the LT3755 and A(MAX) = 85°C, V LT3755-2 is the behavior of the OPENLED pin when the FB IN(MAX) = 40V, fSW = 400kHz, and having a FET with Q pin crosses and re-crosses the FB overvoltage threshold G = 20nC, the maximum IC junction temperature will be approximately: (1.31V typ). The LT3755-2 asserts/de-asserts OPENLED freely when crossing the 1.31V threshold. The LT3755, TJ = 85°C + [40V (1.7mA + 400kHz • 20nC) • 68°C/W] by comparison, de-asserts OPENLED when FB exceeds = 111°C 1.31V and is prevented from re-asserting OPENLED until The Exposed Pad on the bottom of the package must be the FB pin falls below the 1.2V (typ) open LED threshold soldered to a ground plane. This ground should then be and clears the fault. The LT3755-2 has the more general connected to an internal copper ground plane with thermal purpose behavior and is recommended for applications vias placed directly under the package to spread out the using OPENLED. heat dissipated by the IC.
Input Capacitor Selection
If LT3755 junction temperature reaches 165°C, the GATE and PWMOUT pins will be driven to GND and the soft- The input capacitor supplies the transient input current for start (SS) pin will be discharged to GND. Switching will the power inductor of the converter and must be placed be enabled after device temperature is reduced 10°C. This and sized according to the transient current requirements. function is intended to protect the device during momentary The switching frequency, output current and tolerable input thermal overload conditions. voltage ripple are key inputs to estimating the capacitor value. An X7R type ceramic capacitor is usually the best
Frequency Synchronization (LT3755-1 Only)
choice since it has the least variation with temperature and DC bias. Typically, boost and SEPIC converters require a The LT3755-1 switching frequency can be synchronized to lower value capacitor than a buck mode converter. As- an external clock using the SYNC pin. For proper operation, suming that a 100mV input voltage ripple is acceptable, the RT resistor should be chosen for a switching frequency the required capacitor value for a boost converter can be 20% lower than the external clock frequency. The SYNC estimated as follows: pin is disabled during the soft-start period. Observation of the following guidelines about the SYNC V ⎛ µF C OUT ⎞ IN(µF) = ILED(A) • • tSW(µs) • waveform will ensure proper operation of this feature. VIN ⎝⎜ A • µs ⎠⎟ Rev. E 16 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts