Datasheet LTC6993-1, LTC6993-2, LTC6993-3, LTC6993-4 (Analog Devices) - 16
| Fabricante | Analog Devices |
| Descripción | TimerBlox: Monostable Pulse Generator (One Shot) |
| Páginas / Página | 28 / 16 — APPLICATIONS INFORMATION. Basic Operation. Step 4: Calculate and Select … |
| Revisión | E |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
APPLICATIONS INFORMATION. Basic Operation. Step 4: Calculate and Select RSET. Step 1: Select the POL Bit Setting
Línea de modelo para esta hoja de datos
- LTC6993CDCB-1#TRMPBF LTC6993CDCB-1#TRPBF LTC6993CDCB-2#TRMPBF LTC6993CDCB-2#TRPBF LTC6993CDCB-3#TRMPBF LTC6993CDCB-3#TRPBF LTC6993CDCB-4#TRMPBF LTC6993CDCB-4#TRPBF LTC6993CS6-1#TRMPBF LTC6993CS6-1#TRPBF LTC6993CS6-2#TRMPBF LTC6993CS6-2#TRPBF LTC6993CS6-3#TRMPBF LTC6993CS6-3#TRPBF LTC6993CS6-4#TRMPBF LTC6993CS6-4#TRPBF LTC6993HDCB-1#TRMPBF LTC6993HDCB-1#TRPBF LTC6993HDCB-2#TRMPBF LTC6993HDCB-2#TRPBF LTC6993HDCB-3#TRMPBF LTC6993HDCB-3#TRPBF LTC6993HDCB-4#TRMPBF LTC6993HDCB-4#TRPBF LTC6993HS6-1#TRMPBF LTC6993HS6-1#TRPBF LTC6993HS6-1#WTRMPBF LTC6993HS6-1#WTRPBF LTC6993HS6-2#TRMPBF LTC6993HS6-2#TRPBF LTC6993HS6-2#WTRMPBF LTC6993HS6-2#WTRPBF LTC6993HS6-3#TRMPBF LTC6993HS6-3#TRPBF LTC6993HS6-3#WTRMPBF LTC6993HS6-3#WTRPBF LTC6993HS6-4#TRMPBF LTC6993HS6-4#TRPBF LTC6993HS6-4#WTRMPBF LTC6993HS6-4#WTRPBF LTC6993IDCB-1#TRMPBF LTC6993IDCB-1#TRPBF LTC6993IDCB-2#TRMPBF LTC6993IDCB-2#TRPBF LTC6993IDCB-3#TRMPBF LTC6993IDCB-3#TRPBF LTC6993IDCB-4#TRMPBF LTC6993IDCB-4#TRPBF LTC6993IS6-1#TRMPBF LTC6993IS6-1#TRPBF LTC6993IS6-1#WTRMPBF LTC6993IS6-1#WTRPBF LTC6993IS6-2#TRMPBF LTC6993IS6-2#TRPBF LTC6993IS6-2#WTRMPBF LTC6993IS6-2#WTRPBF LTC6993IS6-3#TRMPBF LTC6993IS6-3#TRPBF LTC6993IS6-3#WTRMPBF LTC6993IS6-3#WTRPBF LTC6993IS6-4#TRMPBF LTC6993IS6-4#TRPBF LTC6993IS6-4#WTRMPBF LTC6993IS6-4#WTRPBF LTC6993MPS6-1#TRMPBF LTC6993MPS6-1#TRPBF LTC6993MPS6-2#TRMPBF LTC6993MPS6-2#TRPBF LTC6993MPS6-3#TRMPBF LTC6993MPS6-3#TRPBF LTC6993MPS6-4#TRMPBF LTC6993MPS6-4#TRPBF
Versión de texto del documento
LTC6993-1/LTC6993-2 LTC6993-3/LTC6993-4
APPLICATIONS INFORMATION Basic Operation Step 4: Calculate and Select RSET.
The simplest and most accurate method to program the The final step is to calculate the correct value for RSET LTC6993 is to use a single resistor, RSET , between the SET using the following equation: and GND pins. The design procedure is a four step process. Alternatively, Linear Technology offers the easy-to-use 50k t R OUT SET = • (2) TimerBlox Designer tool to quickly design any LTC6993 1µs NDIV based circuit. Use the free TimerBlox LTC6993: One Shot Web-Based Design Tool. Select the standard resistor value closest to the calculated value.
Step 1: Select the POL Bit Setting.
Example: Design a one-shot circuit that satisfies the fol- The LTC6993 can generate positive or negative output lowing requirements: pulses, depending on the setting of the POL bit. The POL • tOUT = 100µs bit is the DIVCODE MSB, so any DIVCODE ≥ 8 has POL = 1 • Negative Output Pulse and produces active-low pulses. • Rising-Edge Trigger Input
Step 2: Select LTC6993 Version.
• Retriggerable Input Two input-related choices dictate the proper LTC6993 for • Minimum power consumption a given application:
Step 1: Select the POL Bit Setting.
• Is TRIG a rising or falling-edge input? For inverted (negative) output pulse, choose POL = 1. • Should retriggering be allowed? Use Table 2 to select a particular variety of LTC6993.
Step 2: Select the LTC6993 Version.
A rising-edge retriggerable input requires the LTC6993-2.
Step 3: Select the NDIV Frequency Divider Value.
As explained earlier, the voltage on the DIV pin sets the
Step 3: Select the NDIV Frequency Divider Value.
DIVCODE which determines both the POL bit and the NDIV Choose an NDIV value that meets the requirements of value. For a given output pulse width (tOUT), NDIV should Equation (1), using tOUT = 100µs: be selected to be within the following range: 6.25 ≤ NDIV ≤ 100 tOUT t ≤ N OUT Potential settings for N DIV ≤ (1) DIV include 8 and 64. NDIV = 8 is 16µs 1µs the best choice, as it minimizes supply current by us- ing a large R To minimize supply current, choose the lowest N SET resistor. POL = 1 and NDIV = 8 requires DIV value. DIVCODE = 14. Using Table 1, choose R1 = 102k and However, in some cases a higher value for NDIV will provide R2 = 976k values to program DIVCODE = 14. better accuracy (see Electrical Characteristics). Table 1 can also be used to select the appropriate N
Step 4: Select R
DIV
SET .
values for the desired tOUT . Calculate the correct value for RSET using Equation (2): With POL already chosen, this completes the selection of 50k 100µs DIVCODE. Use Table 1 to select the proper resistor divider RSET = • = 625k or V 1µs 8 DIV/V+ ratio to apply to the DIV pin. Rev. E 16 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
APPLICATIONS INFORMATION Basic Operation Step 4: Calculate and Select RSET.
The simplest and most accurate method to program the The final step is to calculate the correct value for RSET LTC6993 is to use a single resistor, RSET , between the SET using the following equation: and GND pins. The design procedure is a four step process. Alternatively, Linear Technology offers the easy-to-use 50k t R OUT SET = • (2) TimerBlox Designer tool to quickly design any LTC6993 1µs NDIV based circuit. Use the free TimerBlox LTC6993: One Shot Web-Based Design Tool. Select the standard resistor value closest to the calculated value.
Step 1: Select the POL Bit Setting.
Example: Design a one-shot circuit that satisfies the fol- The LTC6993 can generate positive or negative output lowing requirements: pulses, depending on the setting of the POL bit. The POL • tOUT = 100µs bit is the DIVCODE MSB, so any DIVCODE ≥ 8 has POL = 1 • Negative Output Pulse and produces active-low pulses. • Rising-Edge Trigger Input
Step 2: Select LTC6993 Version.
• Retriggerable Input Two input-related choices dictate the proper LTC6993 for • Minimum power consumption a given application:
Step 1: Select the POL Bit Setting.
• Is TRIG a rising or falling-edge input? For inverted (negative) output pulse, choose POL = 1. • Should retriggering be allowed? Use Table 2 to select a particular variety of LTC6993.
Step 2: Select the LTC6993 Version.
A rising-edge retriggerable input requires the LTC6993-2.
Step 3: Select the NDIV Frequency Divider Value.
As explained earlier, the voltage on the DIV pin sets the
Step 3: Select the NDIV Frequency Divider Value.
DIVCODE which determines both the POL bit and the NDIV Choose an NDIV value that meets the requirements of value. For a given output pulse width (tOUT), NDIV should Equation (1), using tOUT = 100µs: be selected to be within the following range: 6.25 ≤ NDIV ≤ 100 tOUT t ≤ N OUT Potential settings for N DIV ≤ (1) DIV include 8 and 64. NDIV = 8 is 16µs 1µs the best choice, as it minimizes supply current by us- ing a large R To minimize supply current, choose the lowest N SET resistor. POL = 1 and NDIV = 8 requires DIV value. DIVCODE = 14. Using Table 1, choose R1 = 102k and However, in some cases a higher value for NDIV will provide R2 = 976k values to program DIVCODE = 14. better accuracy (see Electrical Characteristics). Table 1 can also be used to select the appropriate N
Step 4: Select R
DIV
SET .
values for the desired tOUT . Calculate the correct value for RSET using Equation (2): With POL already chosen, this completes the selection of 50k 100µs DIVCODE. Use Table 1 to select the proper resistor divider RSET = • = 625k or V 1µs 8 DIV/V+ ratio to apply to the DIV pin. Rev. E 16 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts