Datasheet ADP1031 (Analog Devices) - 10

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ADP1031 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 6.
Stresses at or above those listed under Absolute Maximum
Parameter Rating
Ratings may cause permanent damage to the product. This is a VINP to PGNDP 61 V stress rating only; functional operation of the product at these SWP to VINP VINP + 70 V or 110 V, or any other conditions above those indicated in the operational whichever is lower section of this specification is not implied. Operation beyond SLEW to GNDP −0.3 V to VINP + 0.3 V the maximum operating conditions for extended periods may EN to GNDP −0.3 V to +61 V affect product reliability. VOUT1 to SGND2 35 V
THERMAL RESISTANCE
FB1 to SGND2 −0.3 V to VOUT1 + 0.3 V VOUT1 to VOUT3 61 V Thermal performance is directly linked to printed circuit board SW2 to SGND2 −0.3 V to VOUT1 + 0.3 V (PCB) design and operating environment. Close attention to VOUT2 to SGND2 6 V PCB thermal design is required. SW3 to SGND2 VOUT3 − 0.3 V to θJA is the natural convection, junction to ambient thermal VOUT1 + 0.3 V resistance measured in a one cubic foot sealed enclosure. θJC VOUT3 to SGND2 −26 V to +0.3 V is measured at the top of the package and is independent of the FB3 to VOUT3 +3.3 V to −0.3 V PCB. The ΨJT value is appropriate for calculating junction to SVDD1 to SGND1 6.0 V case temperature in the application. SVDD2 to SGND2 6.0 V SSS, SCK, SI, SO to SGND1 −0.3 V to SVDD1 + 0.3 V
Table 7. Thermal Resistance
SGPO1, SGPO2, SGPI3 to SGND2 −0.3 V to SVDD2 + 0.3 V
Package Type1, 2, 3, 4 θJA θJC ΨJT Unit
SYNC to SGND2 −0.3 V to +6 V CP-41-1 50.4 33.1 25 °C/W MVDD to MGND 6.0 V 1 9 mm × 7 mm LFCSP with omitted pins for isolation purposes. MSS, MCK, MO, MI to MGND −0.3 V to MVDD + 0.3 V 2 Thermal impedance simulated values are based on a JEDEC 2S2P thermal test board with 19 thermal vias. See JEDEC JESD-51. MGPI1, MGPI2, MGPO3 to MGND −0.3 V to MVDD + 0.3 V 3 Case temperature was measured at the center of the package. PWRGD to MGND −0.3 V to MVDD + 0.3 V 4 Board temperature was measured near Pin 1. Common-Mode Transients ±100 kV/µs Operating Junction Temperature −40°C to +125°C Range1
ESD CAUTION
Storage Temperature Range −65°C to +150°C Lead Temperature JEDEC industry standard Soldering Conditions JEDEC J-STD-020 1 Power dissipated on chip must be derated to keep the junction temperature below 125°C.
Table 8. Maximum Continuous Working Voltage1 Parameter Value Constraint
60 Hz AC Voltage 300 V rms 20-year lifetime at 0.1% failure rate, zero average voltage DC Voltage 424 VPEAK Limited by the creepage of the package, Pollution Degree 2, Material Group II2, 3 1 See the Insulation Lifetime section for more details. 2 Other pollution degree and material group requirements yield a different limit. 3 Some system level standards allow components to use the printed wiring board (PWB) creepage values. The supported dc voltage may be higher for those standards. Rev. A | Page 10 of 38 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT COMPANION PRODUCTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS REGULATORY INFORMATION ELECTROMAGNECTIC COMPATIBILITY INSULATION AND SAFETY RELATED SPECIFICATIONS DIN V VDE 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FLYBACK REGULATOR Flyback Regulator Operation Power Saving Mode (PSM) Flyback Undervoltage Lockout (UVLO) Flyback Regulator Precision Enable Control Flyback Regulator Soft Start Flyback Slew Rate Control Flyback Regulator Overcurrent Protection Flyback Regulator Overvoltage Protection BUCK REGULATOR Buck Regulator Operation Buck Regulator UVLO Buck Regulator Soft Start Buck Regulator Current-Limit Protection Buck Regulator OVP Buck Regulator Active Pull-Down Resistor INVERTING REGULATOR Inverting Regulator Operation Inverting Regulator UVLO Inverting Regulator Soft Start Inverting Regulator Current-Limit Protection Inverting Regulator OVP Inverting Regulator Active Pull-Down Resistor POWER GOOD POWER-UP SEQUENCE OSCILLATOR AND SYNCHRONIZATION THERMAL SHUTDOWN DATA ISOLATION High Speed SPI Channels GPIO Data Channels APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors Capacitor Selection FLYBACK REGULATOR COMPONENTS SELECTION Input Capacitor Output Capacitor Ripple Current vs. Capacitor Value Schottky Diode Transformer Turn Ratio Primary Inductance Flyback Transformer Saturation Current Series Winding Resistance Leakage Inductance and Clamping Circuits Clamping Resistor Clamping Capacitor Clamping Diode Diode Zener Diode Clamp Ripple Current (IAC) vs. Inductance Maximum Output Current Calculation BUCK REGULATOR COMPONENTS SELECTION Inductor Output Capacitor INVERTING REGULATOR COMPONENT SELECTION Inductor Output Capacitor Inverting Regulator Stability INSULATION LIFETIME Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example THERMAL ANALYSIS TYPICAL APPLICATION CIRCUIT PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE