Datasheet AD7293 (Analog Devices)

FabricanteAnalog Devices
Descripción12-Bit Power Amplifier Current Controller with ADC, DACs, Temperature and Current Sensors
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RevisiónD
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12-Bit Power Amplifier Current Controller with. ADC, DACs, and Temperature and Current Sensors. Data Sheet. AD7293. FEATURES

Datasheet AD7293 Analog Devices, Revisión: D

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12-Bit Power Amplifier Current Controller with ADC, DACs, and Temperature and Current Sensors Data Sheet AD7293 FEATURES SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM 4 closed-loop power amplifier (PA) drain current controllers G PRECISION PAV PMOS DD Built-in PA protection, sequencing, and alert features IN 2.5V CONTROL PA_ON AR DAC OR REFERENCE Compatible with both depletion mode and enhancement mode L IT O P ON power amplifiers BI M AD7293 4 1 G × 2 Y NT S Highly integrated IN R 1.25V 2.5V PPL OR IT SO 4 uncommitted 12-bit analog-to-digital converter (ADC) inputs SU BIPOLAR 4 ON Σ M DAC + 4 CURRE SEN ±0.5 LSB typical integral nonlinearity (INL) NT SE Eight 12-bit voltage digital-to-analog converters (DACs) 0V TO +5V S SEN –4V TO +1V CURRE 1.3 µs maximum settling UT 4 –5V TO 0V 12-BIT NP SAR ADC I 4 high-side current sense amplifiers, ±0.1% gain error AR DACs G L O MUX O 2 external temperature sensor inputs, ±1.1°C accuracy ALERT P G AND LIMIT N IN 4 BI Internal temperature sensor, ±1.25°C accuracy REGISTERS 4 ANAL PI + OR Sx IT 2.5 V on-chip reference UNIPOLAR R 4 ON URE D0+ DAC M R Flexible monitoring and control ranges RAT SO E ADC input ranges: 0 V to 1.25 V, 0 V to 2.5 V, and 0 V to 5 V 0V TO 5V P M SEN 2.5V TO 7.5V AR DACs E L Bipolar DAC ranges: 0 V to +5 V, −4 V to +1 V, and −5 V to 0 V 5V TO 10V D0– T O P D1+ Bipolar DAC reset and clamping relative to VCLAMPx voltage 4 UNI Unipolar DAC ranges: 0 V to 5 V, 2.5 V to 7.5 V, and 5 V to 10 V CONTROL LOGIC Current sense gain: 6.25, 12.5, 25, 50, 100, and more ING D1– P RESET SPI DIGITAL LDAC AND Adjustable closed-loop setpoint ramp time AM LOGIC INTERFACE INPUT/OUTPUT CLAMP CONTROL High-side voltage current sensing DAC CL 4 current sense inputs T K N K T Y C 4 V to AV S UT CS N S S T0 T1 A ND ND SS + 60 V, ±200 mV input range CL DI V U R R ESET TE S DO LA EEP0 EEP1 /B /LD DG AG LE LE Small package and flexible interface R Y B ON /C /A /A /SL /SL /IS IO2 5 6 IO7 Serial port interface (SPI) with V TOR O O
001
IO3 IO4 DRIVE supporting 1.8 V, 3 V, and C IO1 GP GP IO0 PI PI GP GP G G 5 V interfaces FA GP
13016-
GP 56-lead LFCSP
Figure 1.
Temperature range: −40°C to +125°C
The device also includes limit registers for alert functions and four
APPLICATIONS
high-side current sense amplifiers to measure current across external shunt resistors. These amplifiers can be optionally set to
GaN and GaAs power amplifier monitoring and controls
operate as part of four independent closed-loop drain current
Base station power amplifiers
controllers.
General-purpose system monitoring and controls GENERAL DESCRIPTION
A high accuracy 2.5 V internal reference is provided to drive the DACs and the ADC. The 12-bit ADC monitors and digitizes the The AD7293 is a PA drain current controller containing internal temperature sensor, and two inputs are included for the functionality for general-purpose monitoring and control of external diode temperature sensors. current, voltage, and temperature, integrated into a single chip solution with an SPI-compatible interface. Note that throughout this data sheet, multifunction pins, such as GPIO4/ALERT1, are referred to either by the entire pin name The device features a 4-channel, 12-bit successive approximation or by a single function of the pin, for example, ALERT1, when register (SAR) ADC, eight 12-bit DACs (four bipolar and four only that function is relevant. unipolar with output ranges that can be configured to shut down under external pin control), a ±1.25°C accurate internal
PRODUCT HIGHLIGHTS
temperature sensor, and eight general-purpose input/output 1. Four independent closed-loop drain current controllers. (GPIO) pins. 2. Built-in monitoring, sequencing, and alert features. 3. Compatible with both depletion mode and enhancement mode power amplifiers.
Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2016–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAMS SPECIFICATIONS ADC DAC TEMPERATURE SENSOR CURRENT SENSOR CLOSED-LOOP SPECIFICATIONS GENERAL TIMING CHARACTERISTICS SPI Serial Interface Asynchronous Inputs Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG-TO-DIGITAL CONVERTER (ADC) OVERVIEW ADC TRANSFER FUNCTIONS ANALOG INPUTS Single-Ended Mode Differential Mode Pseudo Differential Mode CURRENT SENSOR Choosing the External Sense Resistor (RSENSE) TEMPERATURE SENSOR INTERNAL CHANNEL MONITORING DAC OPERATION Bipolar DACs Unipolar DACs DAC Enabling and Clamping Software Clamping: Internal ALERT0 Routing PMOS Drain Switch Control REFERENCE VDRIVE FEATURE OPEN-LOOP MODE CLOSED-LOOP MODE Adjustable Closed-Loop Setpoint Ramp Time Fast Ramp Feature Closed-Loop Sequencing Closed-Loop Integrator Programmable Voltage Limit Closed-Loop Range Upper Voltage Limit DIGITAL INPUT/OUTPUT REGISTERS LOAD DAC (LDAC PIN) Instantaneous DAC Updating (Asynchronous) Deferred DAC Updating (Synchronous) ALERTS AND LIMITS ALERTx Pins Software Alerts Page GPIO0 to GPIO3 Routing to ALERT1 AVDD AND AVSS ALARM MAXIMUM AND MINIMUM PAGES HYSTERESIS REGISTER SETTINGS REGISTERS COMMON TO ALL PAGES No Op Register (Register 0x00) Page Select Pointer Register (Register 0x01) Conversion Command (Register 0x02) Result Register (Register 0x03) DAC Enable Register (Register 0x04) GPIO Register (Register 0x05) Device ID Register (Register 0x0C) Software Reset Register (Register 0x0F) RESULT 0/DAC INPUT (PAGE 0x00) Voltage Input (VINx) Result Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEINT and TSENSEDx) Result Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Result Registers (Register 0x28 to Register 0x2B) DAC Input (UNI-VOUTx and BI-VOUTx) Registers (Register 0x30 to Register 0x37) RESULT 1 (PAGE 0x01) Voltage Supply Monitor Result Registers (Register 0x10 to Register 0x13) Bipolar DAC Internal Monitor Result (BI-VOUT0MON to BI-VOUT3MON) Registers (Register 0x14 to Register 0x17) RSx+MON Result Registers (Register 0x28 to Register 0x2B) CONFIGURATION (PAGE 0x02) Digital Output Enable Register (Register 0x11) Digital Input/Output Function Register (Register 0x12) Digital Functional Polarity Register (Register 0x13) General Register (Register 0x14) VINx Range x Registers (Register 0x15 and Register 0x16) VINx Differential/Single-Ended Enable Register (Register 0x17) VINx Filter Register (Register 0x18) VINx Background Enable Register (Register 0x19) Conversion Delay Register (Register 0x1A) Temperature Sensor (TSENSEx) Background Enable Register (Register 0x1B) Current Sensor (ISENSEx) Background Enable Register (Register 0x1C) Current Sensor (ISENSEx) Gain Register (Register 0x1D) DAC Snooze/SLEEP0 Pin Register (Register 0x1F) DAC Snooze/SLEEP1 Pin Register (Register 0x20) RSx+MON, Supply Monitor, BI-VOUTx Background Enable Register (Register 0x23) Integrator Limit and Closed-Loop Control Register (Register 0x28) PA_ON Control Register (Register 0x29) Ramp Time 0 to Ramp Time 3 Registers (Register 0x2A to Register 0x2D) Closed-Loop Fast Ramp and Integrator Time Constant Register (Register 0x2E) Integrator Limit Active Status (INTLIMITx) and AVSS/AVDD Alarm Mask Register (Register 0x2F) SEQUENCE (PAGE 0x03) Voltage Input (VINx) Sequence Register (Register 0x10) Current Sensor (ISENSEx) and Temperature Sensor (TSENSEx) Sequence Register (Register 0x11) RSx+MON, Supply Monitor, and BI-VOUTx Monitor Sequence Register (Register 0x12) HIGH LIMIT 0 (PAGE 0x04) VINx High Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) High Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) High Limit Registers (Register 0x28 to Register 0x2B) HIGH LIMIT 1 (PAGE 0x05) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI) and AVSS High Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON High Limit Registers (Register 0x14 to Register 0x17) RSx+MON High Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 0 (PAGE 0x06) VINx Low Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Low Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Low Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 1 (PAGE 0x07) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Low Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Low Limit Registers (Register 0x14 to Register 0x17) RSx+MON Low Limit Registers (Register 0x28 to Register 0x2B) HYSTERESIS 0 (PAGE 0x08) VINx Hysteresis Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Hysteresis Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Hysteresis Registers (Register 0x28 to Register 0x2B) HYSTERESIS 1 (PAGE 0x09) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Hysteresis Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Hysteresis Registers (Register 0x14 to Register 0x17) RSx+MON Hysteresis Registers (Register 0x28 to Register 0x2B) MINIMUM 0 (PAGE 0x0A) VINx Minimum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Minimum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Minimum Registers (Register 0x28 to Register 0x2B) MINIMUM 1 (PAGE 0x0B) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Minimum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Minimum Registers (Register 0x14 to Register 0x17) RSx+MON Minimum Registers (Register 0x28 to Register 0x2B) MAXIMUM 0 (PAGE 0x0C) VINx Maximum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Maximum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Maximum Registers (Register 0x28 to Register 0x2B) MAXIMUM 1 (PAGE 0x0D) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Maximum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Maximum Registers (Register 0x14 to Register 0x17) RSx+MON Maximum Registers (Register 0x28 to Register 0x2B) OFFSET 0 (PAGE 0x0E) VINx Offset Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Offset Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Offset Registers (Register 0x28 to Register 0x2B) Unipolar DAC (UNI-VOUTx) Offset Registers (Register 0x30 to Register 0x33) Bipolar DAC (BI-VOUTx) Offset Registers (Register 0x34 to Register 0x37) OFFSET 1 (PAGE 0x0F) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Offset Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Offset Registers (Register 0x14 to Register 0x17) RSx+MON Offset Registers (Register 0x28 to Register 0x2B) ALERT (PAGE 0x10) Alert Summary (ALERTSUM) Register (Register 0x10) VINx Alert Register (Register 0x12) Temperature Sensor (TSENSEx) Alert Register (Register 0x14) Current Sensor (ISENSEx) Alert Register (Register 0x15) Supply and BI-VOUTxMON Alert Register (Register 0x18) RSx+MON Alert Register (Register 0x19) INTLIMITx and AVSS/AVDD Alert Register (Register 0x1A) ALERT0 PIN ROUTING (PAGE 0x11) VINx ALERT0 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT0 Register (Register 0x14) Current Sensor (ISENSEx) ALERT0 Register (Register 0x15) Supply and BI-VOUTxMON ALERT0 Register (Register 0x18) RSx+MON ALERT0 Register (Register 0x19) INTLIMITx and AVss/AVDD ALERT0 Register (Register 0x1A) ALERT1 PIN ROUTING (PAGE 0x12) VINx ALERT1 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT1 Register (Register 0x14) Current Sensor (ISENSEx) ALERT1 Register (Register 0x15) Supply and BI-VOUTxMON ALERT1 Register (Register 0x18) RSx+MON ALERT1 Register (Register 0x19) INTLIMITx and AVSS/AVDD ALERT1 Register (Register 0x1A) SERIAL PORT INTERFACE INTERFACE PROTOCOL MODES OF OPERTION Background Mode (BG) Command Mode Current Sensor and Temperature Sensor Conversions Conversion Timing Current Sense and Temperature Sense Channel Integration Time Conversion and Integration Timing Example 1 Conversion and Integration Timing Example 2 Digital Filtering APPLICATIONS INFORMATION BASE STATION POWER AMPLIFIER CONTROL DEPLETION MODE AMPLIFIER BIASING AND PROTECTION LOOP COMPONENT SELECTION OUTLINE DIMENSIONS ORDERING GUIDE