Datasheet ADRV9009 (Analog Devices) - 2

FabricanteAnalog Devices
DescripciónIntegrated Dual RF Tx, Rx, and Observation Rx
Páginas / Página127 / 2 — ADRV9009. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 5/2019—Rev. A …
RevisiónB
Formato / tamaño de archivoPDF / 3.6 Mb
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ADRV9009. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 5/2019—Rev. A to Rev B

ADRV9009 Data Sheet TABLE OF CONTENTS REVISION HISTORY 5/2019—Rev A to Rev B

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ADRV9009 Data Sheet TABLE OF CONTENTS
Features .. 1  Theory of Operation .. 98  Applications ... 1  Transmitter .. 98  General Description ... 1  Receiver.. 98  Revision History ... 2  Observation Receiver ... 98  Functional Block Diagram .. 4  Clock Input .. 98  Specifications ... 5  Synthesizers ... 98  Current and Power Consumption Specifications ... 14  SPI ... 99  Timing Diagrams .. 15  JTAG Boundary Scan ... 99  Absolute Maximum Ratings .. 16  Power Supply Sequence ... 99  Reflow Profile .. 16  GPIO_x Pins ... 99  Thermal Management ... 16  Auxiliary Converters .. 99  Thermal Resistance .. 16  JESD204B Data Interface .. 99  ESD Caution .. 16  Applications Information .. 101  Pin Configuration and Function Descriptions ... 17  PCB Layout and Power Supply Recommendations ... 101  Typical Performance Characteristics ... 23  PCB Material and Stackup Selection ... 101  75 MHz to 525 MHz Band .. 23  Fanout and Trace Space Guidelines ... 103  650 MHz to 3000 MHz Band .. 44  Component Placement and Routing Guidelines ... 104  3400 MHz to 4800 MHz Band .. 63  RF and JESD204B Transmission Line Layout .. 110  5100 MHz to 5900 MHz Band .. 80  Isolation Techniques Used on the ADRV9009-W/PCBZ ... 114  Transmitter Output Impedance .. 95  RF Port Interface Information .. 116  Observation Receiver Input Impedance .. 95  Outline Dimensions ... 127  Receiver Input Impedance... 96  Ordering Guide .. 127  Terminology .. 97 
REVISION HISTORY 5/2019—Rev. A to Rev B.
Changes to Terminology Section ... 97 Replaced ADRV9009 Customer Card to Deleted Figure 432 ... 98 ADRV9009-WPCBZ ... Throughout Changes to Theory of Operation Section and Clock Changes to Features Section.. 1 Input Section ... 98 Changes to Figure 1 .. 4 Changed Serial Peripheral Interface Section to SPI Section and Changes to Specifications Section and Table 1 ... 5 AUX DAC_x Section to Auxiliary DAC x Section ... 99 Change to Figure 2 ... 15 Changes to Power Supply Sequence Section, GPIO_x Pins Changes to Table 3 and Thermal Resistance Section ... 16 Section, Auxiliary DAC x Section, and JESD204B Data Changes to 75 MHz to 525 MHz Band Section, Figures and Interface Section ... 99 Captions ... 23 Changes to Table 7 Title, Figure 430, and Figure 431... 100 Deleted Figure 83 to Figure 85; Renumbered Sequentially .. 34 Changes to Overview Section, PCB Material and Stackup Added Figure 78, Figure 79, and Figure 80; Renumbered Selection Section, and Figure 432 Caption ... 101 Sequentially ... 35 Changes to Table 9 and Table 10 .. 102 Added Figure 90 .. 37 Changes to Fanout and Trace Space Guidelines Section ... 103 Added Figure 125 to Figure 127 ... 43 Changes to Signals with Highest Routing Priority Section and Changes to 650 MHz to 3000 MHz Band Section, Figures and Figure 434 .. 104 Captions ... 44 Change to Figure 435 Caption .. 105 Changes to 3400 MHz to 4800 MHz Band Section, Figures and Changes to Signals with Second Routing Priority Section and Captions ... 63 Figure 436 .. 106 Changes to 5100 MHz to 5900 MHz Band Section, Figures and Changes to Figure 437 ... 107 Captions ... 80 Changes to Figure 438 ... 108 Rev. B | Page 2 of 127 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Management Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 75 MHz to 525 MHz Band 650 MHz to 3000 MHz Band 3400 MHz to 4800 MHz Band 5100 MHz to 5900 MHz Band Transmitter Output Impedance Observation Receiver Input Impedance Receiver Input Impedance Terminology Theory of Operation Transmitter Receiver Observation Receiver Clock Input Synthesizers RF PLL Clock PLL SPI JTAG Boundary Scan Power Supply Sequence GPIO_x Pins Auxiliary Converters AUXADC_x Auxiliary DAC x JESD204B Data Interface Applications Information PCB Layout and Power Supply Recommendations Overview PCB Material and Stackup Selection Fanout and Trace Space Guidelines Component Placement and Routing Guidelines Signals with Highest Routing Priority Signals with Second Routing Priority Signals with Lowest Routing Priority RF and JESD204B Transmission Line Layout RF Routing Guidelines Transmitter Balun DC Feed Supplies JESD204B Trace Routing Recommendations Routing Recommendations Stripline Transmission Lines vs. Microstrip Transmission Lines Isolation Techniques Used on the ADRV9009-W/PCBZ Isolation Goals Isolation Between JESD204B Lines RF Port Interface Information RF Port Impedance Data Advanced Design System (ADS) Setup Using the DataAccessComponent and SEDZ File Transmitter Bias and Port Interface General Receiver Path Interface Impedance Matching Network Examples Outline Dimensions Ordering Guide