Datasheet ADN8834 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | Ultra compact 1.5 A Thermoelectric Cooler (TEC) Controller |
| Páginas / Página | 27 / 2 — ADN8834. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 9/18—Rev. A to … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 978 Kb |
| Idioma del documento | Inglés |
ADN8834. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 9/18—Rev. A to Rev. B. 8/15—Rev. 0 to Rev. A
Línea de modelo para esta hoja de datos
Versión de texto del documento
link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 6 link to page 6 link to page 6 link to page 7 link to page 8 link to page 12 link to page 13 link to page 14 link to page 14 link to page 14 link to page 15 link to page 15 link to page 15 link to page 15 link to page 16 link to page 16 link to page 17 link to page 18 link to page 18 link to page 18 link to page 19 link to page 19 link to page 20 link to page 20 link to page 21 link to page 21 link to page 23 link to page 23 link to page 23 link to page 24 link to page 27 link to page 27
ADN8834 Data Sheet TABLE OF CONTENTS
Features .. 1 TEC Voltage/Current Monitor ... 16 Applications ... 1 Maximum TEC Voltage Limit .. 16 Functional Block Diagram .. 1 Maximum TEC Current Limit ... 17 General Description ... 1 Applications Information .. 18 Revision History ... 2 Signal Flow .. 18 Specifications ... 3 Thermistor Setup .. 18 Absolute Maximum Ratings .. 6 Thermistor Amplifier (Chopper 1) .. 19 Thermal Resistance .. 6 PID Compensation Amplifier (Chopper 2) .. 19 ESD Caution .. 6 MOSFET Driver Amplifiers .. 20 Pin Configurations and Function Descriptions ... 7 PWM Output Filter Requirements .. 20 Typical Performance Characteristics ... 8 Input Capacitor Selection .. 21 Detailed Functional Block Diagram .. 12 Power Dissipation... 21 Theory of Operation .. 13 PCB Layout Guidelines .. 23 Analog PID Control ... 14 Block Diagrams and Signal Flow ... 23 Digital PID Control .. 14 Guidelines for Reducing Noise and Minimizing Power Loss .. 23 Powering the Control er .. 14 Example PCB Layout Using Two Layers ... 24 Enable and Shutdown .. 15 Outline Dimensions ... 27 Oscillator Clock Frequency ... 15 Ordering Guide .. 27 Temperature Lock Indicator (LFCSP Only) ... 15 Soft Start on Power-Up .. 15
REVISION HISTORY 9/18—Rev. A to Rev. B
Changes to Powering the Control er Section and Figure 27 Added Patent Information... 1 Caption .. 14
8/15—Rev. 0 to Rev. A
Change to Soft Start on Power-Up Section ... 15 Added 24-Lead LFCSP ... Universal Change to Figure 33 ... 18 Changes to Features Section and Table 1 .. 1 Changes to Table 7 .. 21 Changes to Table 2 .. 3 Added Table 8; Renumbered Sequential y .. 21 Changes to Table 3 .. 6 Updated Outline Dimensions ... 27 Added Figure 3; Renumbered Sequential y .. 7 Changes to Ordering Guide .. 27 Changes to Figure 13 .. 9
4/15—Revision 0: Initial Version
Changes to Figure 23 and Figure 24 ... 11 Changes to Figure 25 .. 12 Rev. B | Page 2 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide
ADN8834 Data Sheet TABLE OF CONTENTS
Features .. 1 TEC Voltage/Current Monitor ... 16 Applications ... 1 Maximum TEC Voltage Limit .. 16 Functional Block Diagram .. 1 Maximum TEC Current Limit ... 17 General Description ... 1 Applications Information .. 18 Revision History ... 2 Signal Flow .. 18 Specifications ... 3 Thermistor Setup .. 18 Absolute Maximum Ratings .. 6 Thermistor Amplifier (Chopper 1) .. 19 Thermal Resistance .. 6 PID Compensation Amplifier (Chopper 2) .. 19 ESD Caution .. 6 MOSFET Driver Amplifiers .. 20 Pin Configurations and Function Descriptions ... 7 PWM Output Filter Requirements .. 20 Typical Performance Characteristics ... 8 Input Capacitor Selection .. 21 Detailed Functional Block Diagram .. 12 Power Dissipation... 21 Theory of Operation .. 13 PCB Layout Guidelines .. 23 Analog PID Control ... 14 Block Diagrams and Signal Flow ... 23 Digital PID Control .. 14 Guidelines for Reducing Noise and Minimizing Power Loss .. 23 Powering the Control er .. 14 Example PCB Layout Using Two Layers ... 24 Enable and Shutdown .. 15 Outline Dimensions ... 27 Oscillator Clock Frequency ... 15 Ordering Guide .. 27 Temperature Lock Indicator (LFCSP Only) ... 15 Soft Start on Power-Up .. 15
REVISION HISTORY 9/18—Rev. A to Rev. B
Changes to Powering the Control er Section and Figure 27 Added Patent Information... 1 Caption .. 14
8/15—Rev. 0 to Rev. A
Change to Soft Start on Power-Up Section ... 15 Added 24-Lead LFCSP ... Universal Change to Figure 33 ... 18 Changes to Features Section and Table 1 .. 1 Changes to Table 7 .. 21 Changes to Table 2 .. 3 Added Table 8; Renumbered Sequential y .. 21 Changes to Table 3 .. 6 Updated Outline Dimensions ... 27 Added Figure 3; Renumbered Sequential y .. 7 Changes to Ordering Guide .. 27 Changes to Figure 13 .. 9
4/15—Revision 0: Initial Version
Changes to Figure 23 and Figure 24 ... 11 Changes to Figure 25 .. 12 Rev. B | Page 2 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide