Datasheet ADCMP608 (Analog Devices) - 5

FabricanteAnalog Devices
DescripciónRail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator
Páginas / Página10 / 5 — Data Sheet. ADCMP608. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. VCC. …
RevisiónB
Formato / tamaño de archivoPDF / 237 Kb
Idioma del documentoInglés

Data Sheet. ADCMP608. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. VCC. VEE 2. TOP VIEW. SDN. (Not to Scale). Table 4. ADCMP608 P

Data Sheet ADCMP608 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VCC VEE 2 TOP VIEW SDN (Not to Scale) Table 4 ADCMP608 P

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Data Sheet ADCMP608 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Q 1 6 VCC ADCMP608 VEE 2 TOP VIEW 5 SDN (Not to Scale) V
002
P 3 4 VN
06769- Figure 2. Pin Configuration
Table 4. ADCMP608 P in Function Descriptions Pin No. Mnemonic Description
1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than the analog voltage at the inverting input, VN. 2 VEE Negative Supply Voltage. 3 VP Noninverting Analog Input. 4 VN Inverting Analog Input. 5 SDN Shutdown. Drive this pin low to shut down the device. 6 VCC VCC Supply. Rev. B | Page 5 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE