Datasheet HMC974 (Analog Devices)

FabricanteAnalog Devices
Descripción10 GHz, High Speed Window Comparator
Páginas / Página12 / 1 — High Speed, 10 GHz Window Comparator. Data Sheet. HMC974LC3C. FEATURES. …
RevisiónE
Formato / tamaño de archivoPDF / 351 Kb
Idioma del documentoInglés

High Speed, 10 GHz Window Comparator. Data Sheet. HMC974LC3C. FEATURES. FUNCTIONAL BLOCK DIAGRAM. Propagation delay: 88 ps

Datasheet HMC974 Analog Devices, Revisión: E

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High Speed, 10 GHz Window Comparator Data Sheet HMC974LC3C FEATURES FUNCTIONAL BLOCK DIAGRAM Propagation delay: 88 ps HMC974LC3C I N O Propagation delay at 50 mV overdrive: 20 ps CC EE CC V RT V V Minimum detectable pulse width: 60 ps 16 15 14 13 Differential latch control Power dissipation: 240 mW RT 1 12 ORB 16-terminal 2.9 mm × 2.9 mm LCC package WIN 2 11 WOUTB APPLICATIONS Automatic test equipment (ATE) WIT 3 10 URB High speed instrumentation Clock and data restoration RB 4 9 VCCO Semiconductor test systems Threshold detection in electronic warfare systems 5 6 7 8 I PACKAGE CC LE LE EE BASE
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86 14 Figure 1.
GENERAL DESCRIPTION
The HMC974LC3C is a silicon germanium (SiGe) monolithic, The outputs are single-ended negative logic. Incorporating two ultra fast window comparator that features reduced swing proven comparators at the input provides good dc and dynamic positive emitter-coupled logic (RSPECL) output drivers that are matching and reduces the input capacitance. The reduced swing level latched. Three output ports detect whether an analog input output stages are designed to directly drive 400 mV into 50 Ω signal is above, below, or between two reference levels supplied terminated to a voltage (VTERM = VCCO − 2 V). at the input (see Figure 2). The HMC974LC3C features high speed latches that can either be enabled to latch the output data or left in the track mode to implement a tracking window comparator.
Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE