Datasheet ADP1740, ADP1741 (Analog Devices) - 13
| Fabricante | Analog Devices |
| Descripción | 2 A, Low VIN, Dropout, CMOS Linear Regulator |
| Páginas / Página | 20 / 13 — Data Sheet. ADP1740/ADP1741. REVERSE CURRENT PROTECTION FEATURE. VIN. … |
| Revisión | H |
| Formato / tamaño de archivo | PDF / 776 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADP1740/ADP1741. REVERSE CURRENT PROTECTION FEATURE. VIN. 1V/DIV. OUT. 500mV/DIV. OUT = 1.5V. CIN = COUT = 4.7µF. CH1 1.0V BW
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Data Sheet ADP1740/ADP1741 REVERSE CURRENT PROTECTION FEATURE T VIN 1V/DIV
The ADP1740/ADP1741 have additional circuitry to protect against reverse current flow from VOUT to VIN. For a typical LDO with a PMOS pass device, there is an intrinsic body diode
1
between VIN and VOUT. When V
V
IN is greater than VOUT, this
OUT 500mV/DIV
diode is reverse-biased. If VOUT is greater than VIN, the intrinsic diode becomes forward-biased and conducts current from VOUT to VIN, potentially causing destructive power dissipation.
PG 1V/DIV
The reverse current protection circuitry detects when VOUT is greater than VIN and reverses the direction of the intrinsic diode
2 V
connection, reverse-biasing the diode. The gate of the PMOS
OUT = 1.5V CIN = COUT = 4.7µF
pass device is also connected to VOUT, keeping the device off.
CH1 1.0V BW CH2 500mV BW M40.0µs A CH3 900mV
029 Figure 32 shows a plot of the reverse current vs. the VOUT to VIN
CH3 1.0V BW T 50.40%
07081- differential. Figure 30. Typical PG Behavior vs. VOUT, VIN Rising (VOUT = 1.5 V)
4000 3500 T V 3000 IN A) 1V/DIV µ ( 2500 NT 2000 1 CURRE V E OUT 500mV/DIV RS 1500 E V RE 1000 500 PG 1V/DIV 0 2 V 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
132
OUT = 1.5V CIN = COUT = 4.7µF VOUT – VIN (V)
07081-
CH1 1.0V B
Figure 32. Reverse Current vs. V
W CH2 500mV BW M40.0µs A CH3 900mV
030 OUT − VIN
CH3 1.0V BW T 50.40%
07081- Figure 31. Typical PG Behavior vs. VOUT, VIN Falling (VOUT = 1.5 V) Rev. H | Page 13 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START FUNCTION ADJUSTABLE OUTPUT VOLTAGE (ADP1741) ENABLE FEATURE POWER-GOOD FEATURE REVERSE CURRENT PROTECTION FEATURE APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADP1740/ADP1741 REVERSE CURRENT PROTECTION FEATURE T VIN 1V/DIV
The ADP1740/ADP1741 have additional circuitry to protect against reverse current flow from VOUT to VIN. For a typical LDO with a PMOS pass device, there is an intrinsic body diode
1
between VIN and VOUT. When V
V
IN is greater than VOUT, this
OUT 500mV/DIV
diode is reverse-biased. If VOUT is greater than VIN, the intrinsic diode becomes forward-biased and conducts current from VOUT to VIN, potentially causing destructive power dissipation.
PG 1V/DIV
The reverse current protection circuitry detects when VOUT is greater than VIN and reverses the direction of the intrinsic diode
2 V
connection, reverse-biasing the diode. The gate of the PMOS
OUT = 1.5V CIN = COUT = 4.7µF
pass device is also connected to VOUT, keeping the device off.
CH1 1.0V BW CH2 500mV BW M40.0µs A CH3 900mV
029 Figure 32 shows a plot of the reverse current vs. the VOUT to VIN
CH3 1.0V BW T 50.40%
07081- differential. Figure 30. Typical PG Behavior vs. VOUT, VIN Rising (VOUT = 1.5 V)
4000 3500 T V 3000 IN A) 1V/DIV µ ( 2500 NT 2000 1 CURRE V E OUT 500mV/DIV RS 1500 E V RE 1000 500 PG 1V/DIV 0 2 V 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6
132
OUT = 1.5V CIN = COUT = 4.7µF VOUT – VIN (V)
07081-
CH1 1.0V B
Figure 32. Reverse Current vs. V
W CH2 500mV BW M40.0µs A CH3 900mV
030 OUT − VIN
CH3 1.0V BW T 50.40%
07081- Figure 31. Typical PG Behavior vs. VOUT, VIN Falling (VOUT = 1.5 V) Rev. H | Page 13 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START FUNCTION ADJUSTABLE OUTPUT VOLTAGE (ADP1741) ENABLE FEATURE POWER-GOOD FEATURE REVERSE CURRENT PROTECTION FEATURE APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE