Datasheet AD633 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Low Cost Analog Multiplier |
| Páginas / Página | 20 / 8 — AD633. Data Sheet. FUNCTIONAL DESCRIPTION. ERROR SOURCES. +VS. ±50mV. … |
| Revisión | K |
| Formato / tamaño de archivo | PDF / 1.8 Mb |
| Idioma del documento | Inglés |
AD633. Data Sheet. FUNCTIONAL DESCRIPTION. ERROR SOURCES. +VS. ±50mV. 300kΩ. TO APPROPRIATE. 50kΩ. INPUT TERMINAL. 1kΩ
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AD633 Data Sheet FUNCTIONAL DESCRIPTION
The AD633 is a low cost multiplier comprising a translinear
ERROR SOURCES
core, a buried Zener reference, and a unity-gain connected Multiplier errors consist primarily of input and output offsets, output amplifier with an accessible summing node. Figure 1 scale factor error, and nonlinearity in the multiplying core. The shows the functional block diagram. The differential X and Y input and output offsets can be eliminated by using the optional inputs are converted to differential currents by voltage-to-current trim of Figure 11. This scheme reduces the net error to scale converters. The product of these currents is generated by the factor errors (gain error) and an irreducible nonlinearity multiplying core. A buried Zener reference provides an overal component in the multiplying core. The X and Y nonlinearities scale factor of 10 V. The sum of (X × Y)/10 + Z is then applied are typically 0.4% and 0.1% of full scale, respectively. Scale to the output amplifier. The amplifier summing Node Z allows factor error is typically 0.25% of full scale. The high impedance the user to add two or more multiplier outputs, convert the Z input should always reference the ground point of the driven output voltage to a current, and configure various analog system, particularly if it is remote. Likewise, the differential X computational functions. and Y inputs should reference their respective grounds to Inspection of the block diagram shows the overall transfer realize the ful accuracy of the AD633. function is
+VS
(X1− X2)(Y1−Y2) W = + Z (1)
±50mV
10 V
300kΩ TO APPROPRIATE 50kΩ INPUT TERMINAL 1kΩ (FOR EXAMPLE, X2, Y2, Z)
010
–VS
00786- Figure 11. Optional Offset Trim Configuration Rev. K | Page 8 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION ERROR SOURCES APPLICATIONS INFORMATION MULTIPLIER CONNECTIONS SQUARING AND FREQUENCY DOUBLING GENERATING INVERSE FUNCTIONS VARIABLE SCALE FACTOR CURRENT OUTPUT LINEAR AMPLITUDE MODULATOR VOLTAGE-CONTROLLED, LOW-PASS AND HIGH-PASS FILTERS VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR AUTOMATIC GAIN CONTROL (AGC) AMPLIFIERS MODEL RESULTS EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING MULTISIM EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING PSPICE EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING SIMETRIX EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
AD633 Data Sheet FUNCTIONAL DESCRIPTION
The AD633 is a low cost multiplier comprising a translinear
ERROR SOURCES
core, a buried Zener reference, and a unity-gain connected Multiplier errors consist primarily of input and output offsets, output amplifier with an accessible summing node. Figure 1 scale factor error, and nonlinearity in the multiplying core. The shows the functional block diagram. The differential X and Y input and output offsets can be eliminated by using the optional inputs are converted to differential currents by voltage-to-current trim of Figure 11. This scheme reduces the net error to scale converters. The product of these currents is generated by the factor errors (gain error) and an irreducible nonlinearity multiplying core. A buried Zener reference provides an overal component in the multiplying core. The X and Y nonlinearities scale factor of 10 V. The sum of (X × Y)/10 + Z is then applied are typically 0.4% and 0.1% of full scale, respectively. Scale to the output amplifier. The amplifier summing Node Z allows factor error is typically 0.25% of full scale. The high impedance the user to add two or more multiplier outputs, convert the Z input should always reference the ground point of the driven output voltage to a current, and configure various analog system, particularly if it is remote. Likewise, the differential X computational functions. and Y inputs should reference their respective grounds to Inspection of the block diagram shows the overall transfer realize the ful accuracy of the AD633. function is
+VS
(X1− X2)(Y1−Y2) W = + Z (1)
±50mV
10 V
300kΩ TO APPROPRIATE 50kΩ INPUT TERMINAL 1kΩ (FOR EXAMPLE, X2, Y2, Z)
010
–VS
00786- Figure 11. Optional Offset Trim Configuration Rev. K | Page 8 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION ERROR SOURCES APPLICATIONS INFORMATION MULTIPLIER CONNECTIONS SQUARING AND FREQUENCY DOUBLING GENERATING INVERSE FUNCTIONS VARIABLE SCALE FACTOR CURRENT OUTPUT LINEAR AMPLITUDE MODULATOR VOLTAGE-CONTROLLED, LOW-PASS AND HIGH-PASS FILTERS VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR AUTOMATIC GAIN CONTROL (AGC) AMPLIFIERS MODEL RESULTS EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING MULTISIM EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING PSPICE EXAMPLES OF DC, SIN, AND PULSE SOLUTIONS USING SIMETRIX EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE