Datasheet MAX1086, MAX1087, MAX1088, MAX1089 (Maxim) - 10

FabricanteMaxim
Descripción150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN
Páginas / Página15 / 10 — 150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential …
Formato / tamaño de archivoPDF / 268 Kb
Idioma del documentoInglés

150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN. Output Data Format

150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN Output Data Format

Línea de modelo para esta hoja de datos

Versión de texto del documento

150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN Output Data Format Transfer Function
Figures 5a and 5b illustrate the conversion timing for Figure 6 shows the unipolar transfer function for the the MAX1086–MAX1089. The 10-bit conversion result is MAX1086–MAX1089. Figure 7 shows the bipolar transfer output in MSB first format, followed by two sub-bits (S1 function for the MAX1088/MAX1089. Code transitions and S0). Data on DOUT transitions on the falling edge occur halfway between successive-integer LSB values. of SCLK. All 12-bits must be clocked out before CNVST transitions again. For the MAX1088/MAX1089, data is
Connection to Standard Interfaces
straight binary for unipolar mode and two’s comple- The MAX1086–MAX1089 feature a serial interface that is ment for bipolar mode. For the MAX1086/MAX1087, fully compatible with SPI, QSPI, and MICROWIRE. If a data is always straight binary. serial interface is available, establish the CPU’s serial
Applications Information
interface as a master, so that the CPU generates the seri- al clock for the ADCs. Select a clock frequency up to
Automatic Shutdown Mode
8MHz. With CNVST low, the MAX1086–MAX1089 defaults to an
How to Perform a Conversion
AutoShutdown state (<0.2µA) after power-up and 1) Use a general purpose I/O line on the CPU to hold between conversions. After detecting a rising edge on CNVST low between conversions. CNVST, the part powers up, sets DOUT low and enters track mode. After detecting a falling-edge on CNVST, the 2) Drive CNVST high to acquire AIN1(MAX1086/
MAX1086–MAX1089
device enters hold mode and begins the conversion. A MAX1087) or unipolar mode (MAX1088/MAX1089). maximum of 3.7µs later, the device completes conver- To acquire AIN2(MAX1086/MAX1087) or bipolar sion, enters shutdown and MSB is available at DOUT. mode (MAX1088/MAX1089), drive CNVST low and high again.
External Reference
3) Hold CNVST high for 1.4µs. An external reference is required for the MAX1086– MAX1089. Use a 0.1µF bypass capacitor for best per- 4) Drive CNVST low and wait approximately 3.7µs for formance. The reference input structure allows a volt- conversion to complete. After 3.7µs, the MSB is age range of +1V to VDD + 50mV. available at DOUT. 5) Activate SCLK for a minimum of 12 rising clock edges. DOUT transitions on SCLK’s falling edge OUTPUT CODE OUTPUT CODE MAX1088/MAX1089 MAX1086– V FS REF FULL-SCALE MAX1089 011 . 111 = 2 TRANSITION 11 . 111 011 . 110 ZS = 0 11 . 110 -V -FS = REF 11 . 101 000 . 010 2 000 . 001 V 1LSB = REF 1024 000 . 000 FS = VREF 111 . 111 ZS = GND 111 . 110 V 1LSB = REF 111 . 101 1024 00 . 011 00 . 010 100 . 001 00 . 001 100 . 000 00 . 000 0 1 2 3 FS - FS 0 +FS - 1LSB INPUT VOLTAGE (LSB) INPUT VOLTAGE (LSB) FS - 3/2LSB *VCOM V ≤ REF / 2 *VIN = (AIN+) - (AIN-) Figure 6. Unipolar Transfer Function Figure 7. Bipolar Transfer Function
10 ______________________________________________________________________________________