Datasheet AD708 (Analog Devices) - 11

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Data Sheet AD708 OPERATION WITH A GAIN OF −100 1/2 AD708 VINA
To show the outstanding dc precision of the AD708 in a real application, Table 3 shows an error budget calculation for a gain of −100. This configuration is shown in Figure 28.
DA 10kΩ 10kΩ 10kΩ A0 S1A Table 3. A1 S2A Maximum Error Contribution, A S3A V = 100 Error Sources (S Grade), (Full Scale: V S4A OUT = 10 V, VIN = 100 mV) SENSE
VOS 30 μV/100 mV = 300 ppm
ADG1209 AD8276 V
I
OUT
OS (100 kΩ)(1 nA)/10 V = 10 ppm
V 10kΩ 1kΩ 100Ω SS REF
Gain (2 kΩ Load) 10 V/(5 × 106)/100 mV = 20 ppm
V S4B DD
Noise 0.35 mV/100 mV = 4 ppm
S3B S2B
VOS Drift (0.3 mV/°C)/100 mV = 3 ppm/°C
S1B
Total Unadjusted
DB 10kΩ 10kΩ 10kΩ
Error At 25°C = 334 ppm > 11 bits −55°C to +125°C = 634 ppm > 10 bits 9 2
V
0
INB 1/2
9- With Offset
AD708
578 0 Calibrated Out At 25°C = 34 ppm > 14 bits Figure 29. Precision PGA −55°C to +125°C = 334 ppm > 11 bits The gains of the circuit are controlled by the select lines, A0 and A1, of the ADG1209 multiplexer and are 1, 10, 100, and 1000 in this design.
100kΩ +V
The input stage attains very high dc precision due to the 30 μV
S 0.1µF
maximum offset voltage match of the AD708 and the 1 nA
1kΩ
maximum input bias current match. The accuracy is main-
VIN 2 – 8
tained over temperature because of the ultralow drift
1/2
performance of the AD708.
AD708 1 VOUT
The AD8276 unity-gain difference amplifier eliminates the need
3 + 4 0.1µF
for trimming in the second stage of the instrumentation
1kΩ
amplifier. The AD8276 has on-chip resistors that are laser 028 trimmed for excellent gain accuracy and high CMRR.
–VS
5789- 0 Figure 28. Gain of −100 Configuration To determine the CMRR, follow these steps: This error budget assumes no error in the resistor ratio and no 1. Connect VINB to VINA and apply an input voltage equal to error from power supply variation (the 120 dB minimum PSRR the maximum and minimum full-scale common mode of the AD708S makes this a good assumption). The external expected. resistors can cause gain error from mismatch and drift over 2. Use the following equation to determine the CMRR: temperature. V  CMRR = 20  log CM
HIGH PRECISION PROGRAMMABLE GAIN
V  OUT
AMPLIFIER
where VCM is the common-mode voltage. The 3-op-amp programmable gain amplifier shown in Figure 29 To minimize gain errors, follow these steps: utilizes the matching characteristics of the AD708 to achieve high dc precision. 1. Select gain = 10 with the control lines and apply a differential input voltage. 2. Adjust the 10 kΩ potentiometer to VOUT = 10 VIN (adjust VIN magnitude as necessary). 3. Repeat Step 1 and Step 2 for gain = 100 and gain = 1000, adjusting the 1 kΩ and 100 Ω potentiometers, respectively. The design shown in Figure 29 allows 0.1% gain accuracy and 100 dB common-mode rejection when ±1% resistors and ±10% potentiometers are used. Rev. D | Page 11 of 16 Document Outline Features Pin Configuration General Description Product Highlights Revision History Specifications Absolute Maximum Ratings ESD Caution Typical Performance Characteristics Matching Characteristics Theory of Operation Crosstalk Performance Operation with a Gain of −100 High Precision Programmable Gain Amplifier Bridge Signal Conditioner Precision Absolute Value Circuit Selection of Passive Components Outline Dimensions Ordering Guide