Datasheet ADP1864 (Analog Devices) - 3

FabricanteAnalog Devices
DescripciónConstant Frequency Current-Mode Step-Down DC-to-DC Controller in TSOT
Páginas / Página16 / 3 — Data Sheet. ADP1864. SPECIFICATIONS. Table 1. Parameter. Symbol. …
RevisiónC
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Data Sheet. ADP1864. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. Min. Typ. Max. Unit

Data Sheet ADP1864 SPECIFICATIONS Table 1 Parameter Symbol Conditions Min Typ Max Unit

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Data Sheet ADP1864 SPECIFICATIONS
VIN = 5 V, TJ = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY Input Voltage V 3.15 14 V IN Quiescent Current I V = 3.15 V to 14 V, PGATE = IN 235 360 μA Q IN Shutdown Supply Current I V = 3.15 V to 14 V, COMP = GND 7 15 μA SD IN Undervoltage Lockout Threshold V V falling, T = −40°C to +125°C 2.75 2.90 3.01 V UVLO IN J V rising, T = −40°C to +125°C 2.85 3.00 3.15 V IN J ERROR AMPLIFIER FB Input Current I V = 0.8 V, T = 25°C −20 −2 +20 nA FB FB J V = 0.8 V, T = −40°C to +125°C −40 −2 +40 nA FB J Amplifier Transconductance V = 0.8 V, I = ±5 μA 0.24 mmho FB COMP COMP Startup Threshold V = 3.15 V to 14 V, T = −40°C to +125°C 0.55 0.67 0.80 V IN J COMP Shutdown Threshold V = 3.15 V to 14 V, T = −40°C to +125°C 0.15 0.3 0.55 V IN J COMP Start-Up Current Source COMP = GND 0.25 0.6 0.95 μA FB Regulation Voltage V = 3.15 V to 14 V, T = −40°C to +125°C 0.790 0.8 0.810 V IN J Overvoltage Protection Threshold V Measured at FB, T = −40°C to +125°C 0.87 0.885 0.9 V OVP J Overvoltage Protection Hysteresis 50 mV CURRENT SENSE Peak Current Sense Voltage T = −40°C to +125°C 90 125 mV J V = 3.15 V to 14 V, T = −40°C to +125°C 70 125 mV IN J Current Sense Gain V to V 12 V/V CS COMP OUTPUT REGULATION Line Regulation1 V = 3.15 V to 14 V, V /V 0.12 mV/V IN FB IN Load Regulation2 V /V −2 mV/V FB COMP OSCILLATOR Oscillator Frequency V = 0.8 V, T = −40°C to +125°C 500 580 650 kHz FB J V = 0 V 190 kHz FB FB Frequency Foldback Threshold 0.35 V GATE DRIVE Gate Rise Time C = 3 nF 50 ns GATE Gate Fall Time C = 3 nF 40 ns GATE Minimum On Time PGATE minimum low duration 190 ns SOFT START POWER-ON TIME 1.1 ms 1 Line regulation is measured using the application circuit in Figure 1. Line regulation is specified as the change in the FB voltage resulting from a 1 V change in the IN voltage. 2 Load regulation is measured using the application circuit in Figure 1. Load regulation is specified as the change in the FB voltage resulting from a 1 V change in the COMP voltage. The COMP voltage range is typically 0.9 V to 2.3 V for the minimum to maximum load current condition. Rev. C | Page 3 of 16 Document Outline Features Applications General Description Typical Applications Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Loop Startup Short-Circuit Protection Undervoltage Lockout (UVLO) Overvoltage Lockout Protection (OVP) Soft Start Applications Information ADIsimPower Design Tool Duty Cycle Ripple Current Sense Resistor Inductor Value MOSFET Diode Input Capacitor Output Capacitor Feedback Resistors Layout Considerations Example Applications Circuits Outline Dimensions Ordering Guide