Datasheet TB9053FTG,TB9054FTG - Preliminary (Toshiba) - 5

FabricanteToshiba
DescripciónBi-CMOS Linear Integrated Circuit, Silicon Monolithic
Páginas / Página36 / 5 — Preliminary. 5.1.2. Combined 2-channel mode (LARGE mode) (OSEL1 = L and …
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Preliminary. 5.1.2. Combined 2-channel mode (LARGE mode) (OSEL1 = L and OSEL2 = L). Table 5.2 H-bridge motor function 2

Preliminary 5.1.2 Combined 2-channel mode (LARGE mode) (OSEL1 = L and OSEL2 = L) Table 5.2 H-bridge motor function 2

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Preliminary
TB9053FTG,TB9054FTG
5.1.2. Combined 2-channel mode (LARGE mode) (OSEL1 = L and OSEL2 = L)
PWM3 and PWM4 are ineffective. Externally short-circuit ISEL1/2, EN1/2, ENB1/2, OUT1/2, and OUT3/4.
Table 5.2 H-bridge motor function 2
PWM1 PWM2 EN ENB SLEEPB
OUT1/2 OUT3/4
Forward H L H L H
H L
Short brake L L H L H
L L
Reverse L H H L H
L H
Short brake H H H L H
H H
EN Disable X X L L H
Z Z
ENB Disable X X H H H
Z Z
Sleep mode X X X L/H L
Z Z
EN Disconnected X X Z X X
Z Z
ENB Disconnected X X X Z X
Z Z
PWM1 Disconnected Z L/H H L H
L L/H
PMM2 Disconnected L/H Z H L H
L/H L
Note: When SLEEPB = L, the ENB1/2 pins does not use OPEN, set the ENB1/2 pins to L or H. ● Combined 2-channel mode (LARGE mode) uses the IC as a 1-channel device by short-circuiting the outputs as follows: M M O O O O V V O O O O U U U U B B U U U U T T T T A A T T T T 4 4 3 3 T T 2 2 1 1 © 20 20 5 2020-12-10 Toshiba Electronic Devices & Storage Corporation