Datasheet BP45F4NB, BP45FH4NB (Holtek) - 53

BP45F4NB/BP45FH4NB BP45F4NB/BP45FH4NB Power Bank Flash MCU Power Bank Flash MCU Program Counter Low Byte Register – PCL
To provide additional program control functions, the low byte of the Program Counter is made accessible to programmers by locating it within the Special Purpose area of the Data Memory. By manipulating this register, direct jumps to other program locations are easily implemented. Loading a value directly into this PCL register will cause a jump to the specified Program Memory location. However, as the register is only 8-bit wide, only jumps within the current Program Memory page are permitted. When such operations are used, note that a dummy cycle will be inserted.
Look-up Table Registers – TBLP, TBHP, TBLH
These three special function registers are used to control operation of the look-up table which is stored in the Program Memory. TBLP and TBHP are the table pointers and indicate the location where the table data is located. Their value must be setup before any table read commands are executed. Their value can be changed, for example using the “INC” or “DEC” instructions, allowing for easy table data pointing and reading. TBLH is the location where the high order byte of the table data is stored after a table read data instruction has been executed. Note that the lower order table data byte is transferred to a user defined location.
Option Memory Mapping Register – ORMC
The ORMC register is used to enable Option Memory Mapping function. The Option Memory capacity is 32 words. When a specific pattern of 55H and AAH is consecutively written into this register, the Option Memory Mapping function will be enabled and then the Option Memory code can be read by using the table read instruction. The Option Memory addresses 00H~1FH will be mapped to Program Memory last page addresses E0H~FFH. To successfully enable the Option Memory Mapping function, the specific pattern of 55H and AAH must be written into the ORMC register in two consecutive instruction cycles. It is therefore recommended that the global interrupt bit EMI should first be cleared before writing the specific pattern, and then set high again at a proper time according to users’ requirements after the pattern is successfully written. An internal timer will be activated when the pattern is successfully written. The mapping operation will be automatically finished after a period of 4×tLIRC. Therefore, users should read the data in time, otherwise the Option Memory Mapping function needs to be restarted. After the completion of each consecutive write operation to the ORMC register, the timer will recount. When the table read instructions are used to read the Option Memory code, both “TABRD [m]” and “TABRDL [m]” instructions can be used. However, care must be taken if the “TABRD [m]” instruction is used, the table pointer defined by the TBHP register must be referenced to the last page. Refer to corresponding sections about the table read instruction for more details.
• ORMC Register Bit 7 6 5 4 3 2 1 0
Name ORMC7 ORMC6 ORMC5 ORMC4 ORMC3 ORMC2 ORMC1 ORMC0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit 7~0
ORMC7~ORMC0
: Option Memory Mapping specific pattern When a specific pattern of 55H and AAH is written into this register, the Option Memory Mapping function will be enabled. Note that the register content will be cleared after the MCU is woken up from the IDLE/SLEEP mode. Rev. 1.00 52 December 07, 2020 Rev. 1.00 53 December 07, 2020 Document Outline Features CPU Features Peripheral Features General Description Selection Table Block Diagram Pin Assignment Pin Description Level Shift Input/Output Relationship and Reset Condition Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics High Speed Internal Oscillator – HIRC – Frequency Accuracy Low Speed Internal Oscillator Characteristics – LIRC Operating Frequency Characteristic Curves System Start Up Time Characteristics Input/Output Characteristics Input/Output (without Multi-power) D.C Characteristics Input/Output (with Multi-power) D.C Characteristics Memory Characteristics LVR/LVD Electrical Characteristics A/D Converter Electrical Characteristics Over/Under Voltage Protection Electrical Characteristics Over Current Protection Electrical Characteristics USB Auto Detection Electrical Characteristics LDO Regulator Electrical Characteristics Level Converter Electrical Characteristics Power-on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS In Application Programming – IAP Data Memory Structure Data Memory Addressing General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0, IAR1, IAR2 Memory Pointers – MP0, MP1L/MP1H, MP2L/MP2H Accumulator – ACC Program Counter Low Byte Register – PCL Look-up Table Registers – TBLP, TBHP, TBLH Option Memory Mapping Register – ORMC Status Register – STATUS Oscillators Oscillator Overview System Clock Configurations Internal High Speed RC Oscillator – HIRC Internal 32kHz Oscillator – LIRC Operating Modes and System Clocks System Clocks System Operation Modes Control Registers Operating Mode Switching Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers I/O Port Power Source Control I/O Port Source Current Control Pin-shared Functions I/O Pin Structure Programming Considerations Timer Modules – TM Introduction TM Operation TM Clock Source TM Interrupts TM External Pins Programming Considerations Compact Type TM – CTM Compact Type TM Operation Compact Type TM Register Description Compact Type TM Operating Modes Periodic Type TM – PTM Periodic Type TM Operation Periodic Type TM Register Description Periodic Type TM Operation Modes Complementary PWM Output with Dead Time Dead Time Insertion Complementary PWM Registers Analog to Digital Converter A/D Converter Overview A/D Converter Register Description A/D Converter Reference Voltage A/D Converter Input Signals A/D Converter Operation Conversion Rate and Timing Diagram Summary of A/D Conversion Steps Programming Considerations A/D Conversion Function A/D Conversion Programming Examples Universal Serial Interface Module – USIM SPI Interface I2C Interface UART Interface Over Current Protection Over Current Protection Operation Over Current Protection Registers Input Voltage Range OCP OPA and Comparator Offset Calibration Over/Under Voltage Protection OUVP Circuit Operation OUVP Register Description OVP and UVP Comparator Offset calibration USB Auto Detection D1+/D1- and D2+/D2- for Auto Detection USB Auto Detection Registers Interrupts Interrupt Registers Interrupt Operation External Interrupts A/D Converter Interrupt Over Current Protection Interrupt Over Voltage Protection Interrupt Under Voltage Protection Interrupts Multi-function Interrupts Timer Module Interrupts USIM Interrupt Time Base Interrupts LVD Interrupt Interrupt Wake-up Function Programming Considerations Low Voltage Detector – LVD LVD Register LVD Operation Application Circuits Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Extended Instruction Set Instruction Definition Extended Instruction Definition Package Information 24-pin SSOP (150mil) Outline Dimensions 28-pin SSOP (150mil) Outline Dimensions SAW Type 28-pin QFN (4mm×4mm) Outline Dimensions