Datasheet HMC382LP3, 382LP3E (Analog Devices)

FabricanteAnalog Devices
DescripciónGaAs PHEMT MMIC LOW NOISE AMPLIFIER, 1.7 - 2.2 GHz
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HMC382LP3 / 382LP3E. GaAs PHEMT MMIC. LOW NOISE AMPLIFIER, 1.7 - 2.2 GHz. Typical Applications. Features. Functional Diagram

Datasheet HMC382LP3, 382LP3E Analog Devices

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HMC382LP3 / 382LP3E
v02.0320
GaAs PHEMT MMIC LOW NOISE AMPLIFIER, 1.7 - 2.2 GHz Typical Applications Features
The HMC382LP3 / HMC382LP3E is ideal for: Noise Figure: 1 dB T • Cel ular/3G Infrastructure Output IP3: +30 dBm M S • Base Stations & Repeaters Gain: 17 dB - • CDMA, W-CDMA, & TD-SCDMA Externally Adjustable Supply Current E • GSM/GPRS & EDGE Single Positive Supply: +5V IS 50 Ohm Matched Input/Output O N
Functional Diagram General Description
W The HMC382LP3 & HMC382LP3E high dynamic LO range GaAs PHEMT MMIC Low Noise Amplifiers are - ideal for GSM & CDMA cel ular basestation front-end S receivers operating between 1.7 and 2.2 GHz. This R LNA has been optimized to provide 1.0 dB noise figure, IE 17 dB gain and +30 dBm output IP3 from a single supply of +5V. The HMC382LP3 & HMC382LP3E LIF feature an external y adjustable supply current which P al ows the designer to tailor the linearity performance M of the LNA for each application. For applications A which require improved noise fi gure, please see the HMC618LP3(E).
Electrical Specifi cations, TA = +25° C, Vdd1, Vdd2 = +5V, Rbias = 16 Ohms*
Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units Frequency Range 1.7 - 1.9 1.9 - 2.0 2.0 - 2.1 2.1 - 2.2 GHz Gain 14 17 12 15 11 14 9 12 dB Gain Variation Over Temperature 0.01 0.015 0.01 0.015 0.01 0.015 0.01 0.015 dB/°C Noise Figure 1.0 1.3 1.05 1.35 1.15 1.45 1.2 1.5 dB Input Return Loss 13 12 11 10 dB Output Return Loss 10 13 12 9 dB Reverse Isolation 37 36 35 35 dB Output Power for 16 16 15.5 14 dBm 1dB Compression (P1dB) Output Third Order Intercept (IP3) (-20 dBm Input Power per tone, 29.5 30 30 29.5 dBm 1 MHz tone spacing) Supply Current (Idd) 67 67 67 67 mA * Rbias resistor value sets current. See application circuit herein. I F nf o or r p mati roic n e fu , d rnis e h leiv d e b ry y , a Analn o d t g D o p evic leac s i e o s bel rid ev e e rs d t : A o b n e a a lco c g D urat e e a v n ic d re elsi, I abl n e c . H , O owe n vee T r, n e o chn F o o lo r p g ri y W ce a , d y el, P ive.O ry . B , anox 9 d t 10 o pl 6 a , N c o e orrw de o r o s d, M : Anal A 0 o 2 g D 0 e 6 vi 2 c - e 9 s 10 , I 6 nc., responsibility is assumed by Analog Devices for it P s u h se on , no er f: 78 or an 1- y i 3 nfr2in9g-e4 m 7 e 0 nt 0 • O s of paterd nt e s or o r ot n h leir rights of third parties that may result from its use. Specifications subject to change without notice. No ne a O t w n w e Te w ch.a n n ol a o lgog. y Wcao y m , P.O. Box 9106, Norwood, MA 02062-9106
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