Datasheet HMC463LP5, 463LP5E (Analog Devices)

FabricanteAnalog Devices
DescripciónGaAs pHEMT MMIC LOW NOISE AGC AMPLIFIER, 2 - 20 GHz
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HMC463LP5 / 463LP5E. GaAs pHEMT MMIC LOW NOISE. AGC AMPLIFIER, 2 - 20 GHz. Typical Applications. Features. Functional Diagram

Datasheet HMC463LP5, 463LP5E Analog Devices

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HMC463LP5 / 463LP5E
v09.0717
GaAs pHEMT MMIC LOW NOISE AGC AMPLIFIER, 2 - 20 GHz
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Typical Applications Features
T The HMC463LP5(E) is ideal for: Gain: 13 dB M • Telecom Infrastructure Noise Figure: 2.8 dB @ 10 GHz • Microwave Radio & VSAT P1dB Output Power: +18 dBm @ 10 GHz • Military EW, ECM & C3I Supply Voltage: +5V @ 60mA E - S • Test Instrumentation 50 Ohm Matched Input/Output IS O • Fiber Optics 32 Lead 5x5mm SMT Package: 25mm² W N
Functional Diagram General Description
O The HMC463LP5(E) is a GaAs MMIC pHEMT Low Noise AGC Distributed Amplifier packaged in a lead- less 5x5 mm surface mount package which oper- S - L ates between 2 and 20 GHz. The amplifier provides R 13 dB of gain, 2.8 dB noise figure and 18 dBm of out- IE put power at 1 dB gain compression while requiring only 60mA from a +5V supply. An optional gate bias LIF (Vgg2) is provided to al ow Adjustable Gain Control P (AGC) of 8 dB typical. Gain flatness is excel ent at M ±0.5 dB from 6 - 18 GHz making the HMC463LP5(E) A ideal for EW, ECM RADAR and test equipment appli- cations. The HMC463LP5(E) LNA I/Os are internal y matched to 50 Ohms and are internal y DC blocked.
Electrical Specifications, T = +25 °C, Vdd = 5V, Idd = 60 mA* A
Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units Frequency Range 2 - 6 6 - 18 18 - 20 GHz Gain 10 13 9 12 8 11 dB Gain Flatness ±0.5 ±0.5 ±0.5 dB Gain Variation Over Temperature 0.010 0.015 0.010 0.015 0.010 0.015 dB/ °C Noise Figure 3 4 3 5 5.5 6.5 dB Input Return Loss 15 13 12 dB Output Return Loss 13 10 10 dB Output Power for 1 dB Compression 16 19 11 16 10 12 dBm (P1dB) Saturated Output Power (Psat) 21 19 19 dBm Output Third Order Intercept (IP3) 30 24 22 dBm Supply Current 60 80 60 80 60 80 mA (Idd) (Vdd = 5V, Vgg1 = -0.9V Typ.) * Adjust Vgg1 between -2 to -0V to achieve Idd = 60 mA typical. InF foo r r p mati r o ic n fe u , d rnis e heliv d e b r y yA, a nal n o d t g D o p evic l e a s c i e o s belird ev e e r d st: A o b n e a aclo cug D rate e a v n ic d r e el s ia , I bl n e c . H., O owevn e e T r, n e o ch Fn oolo r p g ri y W ce a , d y el , P ive .rO y . B , an ox 9 d t 10 o pl 6 a , N c o e or rw de o rsod : A, M nal A 0 o 2 g D 0 e 6 vi 2 c - e 9 s 10 , In6 c., responsibility is assumed by Analog Devices for it P s us heo , nnoe r f : 78 or an 1 y i-n3fri2n9 g -e4 m 7 en 0t0 • O s of pate rndte s o r o r ot n he lir rights of third parties that may result from its use. Specifications subject to change without notice. No ne a O t w ne Tw e w ch .a nonla o l g og. y W c a o y m , P.O. Box 9106, Norwood, MA 02062-9106
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