Data SheetADTR11074000.26GHz3758GHz10GHz0.112GHz35014GHz16GHz018GHz325A)A)–0.1(m(mA300A_P_P–0.2I DD275I GG6GHz–0.38GHz25010GHz12GHz14GHz225–0.416GHz18GHz200 8 –0.5 0 –20–15–10–50510 -04 –20–15–10–50510 -05 INPUT POWER (dBm) 146 146 22 INPUT POWER (dBm) 22 Figure 48. IDD_PA vs. Input Power for Various Frequencies, Transmit State, Figure 50. Power Amplifier Gate Current (IGG_PA) vs. Input Power for Various Path = TX_IN to ANT, VDD_PA = 5 V, IDQ_PA = 220 mA, Receive State Off Frequencies, Transmit State, Path = TX_IN to ANT, VDD_PA = 5 V, IDQ_PA = 220 mA, Receive State Off 800700600500A)400(m A _P300I DQ2001000–100 9 –1.75–1.50–1.25–1.00–0.75–0.50–0.25 04 6- VGG_PA (V) 2214 Figure 49. IDQ_PA vs. VGG_PA, VDD_PA = 5 V, Transmit State, Path = TX_IN to ANT, VDD_PA = 5 V, Receive State Off Rev. A | Page 15 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS TRANSMIT STATE RECEIVE STATE THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING TYPICAL APPLICATION CIRCUIT INTERFACING THE ADTR1107 TO THE ADAR1000 X BAND AND KU BAND BEAMFORMER OUTLINE DIMENSIONS ORDERING GUIDE