Datasheet VCNL36825T (Vishay) - 8

VCNL36825T
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Function Description
VCNL36825T supports different kinds of mechanical designs to achieve the best proximity detection performance for any color of object with more flexibility. The basic PS function settings, such as measurement period, integration time, interrupt, PS start / stop and persistence, are handled by the register PS_CONF2_L. PS_PERIOD controls the PS response time. PS_IT represents the duration of the energy being received. The PS_INT is asserted when the PS detection levels higher than the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the interrupt function is enabled, the host reads the PS output data from VCNL36825T that saves host loading from periodically reading PS_DATA. More than that, INT_FLAG indicates the behavior of INT triggered under different conditions. PS_PERS sets up the PS_INT asserted conditions as long as the PS output value continually exceeds the threshold level. The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon. A smart persistence (register: PS_SMART_PERS) is provided to get faster PS response time and prevent false trigger for PS.
TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION COMMAND DATE BYTE REGISTER DEFAULT R / W FUNCTION DESCRIPTION CODE LOW / HIGH NAME VALUE
L PS_CONF1_L R / W 0x01 Calibration and on / off 0x00 H PS_CONF1_H R / W 0x00 Initialization PS period, persistence, interrupt, smart persistence, and PS start / L PS_CONF2_L R / W 0x01 0x03 stop H PS_CONF2_H R / W 0x00 PS integration time, multi pulse and interrupt function L PS_CONF3_L R / W 0x00 PS force mode and sunlight light protect interrupt setting 0x04 H PS_CONF3_H R / W 0x00 PS VCSEL current L PS_THDL_L R / W 0x00 PS low interrupt threshold setting (data byte low) 0x05 H PS_THDL_H R / W 0x00 PS low interrupt threshold setting (data byte high) L PS_THDH_L R / W 0x00 PS high interrupt threshold setting (data byte low) 0x06 H PS_THDH_H R / W 0x00 PS high interrupt threshold setting (data byte high) L PS_CANC_L R / W 0x00 PS cancellation setting (data byte low) 0x07 H PS_CANC_H R / W 0x00 PS cancellation setting (data byte high) L PS_CONF4_L R / W 0x00 PS auto-calibration period, number, interrupt setting 0x08 H PS_CONF4_H R / W 0x00 PS low power mode setting L PS_DATA_L R 0x00 PS channel output data (data byte low) 0xF8 H PS_DATA_H R 0x00 PS channel output data (data byte high) L Reserved R 0x00 Reserved 0xF9 H INT_FLAG R 0x00 PS interrupt flag L ID_L R 0x26 Device ID (data byte low) 0xFA H ID_H R 0x00 Device ID (data byte high) L PS_AC_DATA_L R 0x00 PS auto-calibration data (data byte low) 0xFB H PS_AC_DATA_H R 0x00 PS auto-calibration data (data byte high), busy and sunlight protect
Note
• All of reserved register are used for internal test. Please keep as default setting Rev. 1.2, 22-Mar-2021
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