Datasheet RDA5807FP (RDA Microelectronics) - 4

FabricanteRDA Microelectronics
DescripciónSingle-Chip Broadcast FM Radio Tuner
Páginas / Página23 / 4 — 3 Functional Description. 3.1 FM Receiver. 3.2 Synthesizer. 3.3 Power …
Revisión1.0
Formato / tamaño de archivoPDF / 666 Kb
Idioma del documentoInglés

3 Functional Description. 3.1 FM Receiver. 3.2 Synthesizer. 3.3 Power Supply. 3.4 RESET and Control Interface select

3 Functional Description 3.1 FM Receiver 3.2 Synthesizer 3.3 Power Supply 3.4 RESET and Control Interface select

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RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
3 Functional Description
LOUT I I L PGA ADC DAC Audio DSP FMIN + Core LNA - digital filter MPX decoder stereo/mono ROUT Q Q audio R Limiter PGA ADC DAC RDS GPIO 32.768 KHz VCO GPIO /RBDS Synthesizer RCLK RSSI SCLK MCU 2.7-3.3V Interface VDD Bus LDO SDIO RDA5807FP Figure 3-1. RDA5807FP FM Tuner Block Diagram
3.1 FM Receiver
30 KHz. The receiver uses a digital low-IF architecture that
3.2 Synthesizer
avoids the difficulties associated with direct conversion while delivering lower solution cost The frequency synthesizer generates the local and reduces complexity, and integrates a low oscillator signal which divide to multi-phase, then noise amplifier (LNA) supporting the FM be used to downconvert the RF input to a broadcast band (50 to 115MHz), a multi-phase constant low intermediate frequency (IF). The image-reject mixer array, a programmable gain synthesizer reference clock is 32.768 KHz. control (PGA), a high resolution analog-to-digital converters (ADCs), an audio DSP and a high- The synthesizer frequency is defined by bits fidelity digital-to-analog converters (DACs). CHAN[9:0] with the range from 50MHz to 115MHz. The limiter prevents overloading and limits the amount of intermodulation products created by strong adjacent channels. The multi-phase mixer array down converts the LNA output differential RF signal to low-IF, it also
3.3 Power Supply
has image-reject function and harmonic tones rejection. The RDA5807FP integrated one LDO which The PGA amplifies the mixer output IF signal and supplies power to the chip. The external supply then digitized with ADCs. voltage range is 2.7-3.3 V. The DSP core finishes the channel selection, FM demodulation, stereo MPX decoder and output
3.4 RESET and Control Interface select
audio signal. The MPX decoder can autonomous switch from stereo to mono to limit the output The RDA5807FP is RESET itself When VDD is noise. Power up. And also support soft reset by trigger 02H BIT1 from 0 to 1. T he RDA5807FP only The DACs convert digital audio signal to analog support I2C control interface bus mode. and change the volume at same time. The DACs has low-pass feature and -3dB frequency is about The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of RDA. Page 4 of 23 Document Outline 1 General Description Features Applications 2 Table of Contents 3 Functional Description 3.1 FM Receiver Synthesizer Power Supply RESET and Control Interface select Control Interface IP2PS Audio Data Interface GPIO Outputs 4 Electrical Characteristics 5 Receiver Characteristics 6 Serial Interface 6.1 IP2PC Interface Timing 7 Register Definition 8 Pins Description 9 Application Diagram 9.1 RDA5807FP Common Application : Bill of Materials: 10 Physical Dimension 11 PCB Land Pattern: 12 Change List Contact Information