Datasheet PEMD12, PUMD12 (Nexperia) - 5

FabricanteNexperia
DescripciónNPN/PNP Resistor-Equipped Transistors; R1 = 47 kΩ, R2 = 47 kΩ
Páginas / Página17 / 5 — NXP Semiconductors. PEMD12; PUMD12. NPN/PNP resistor-equipped …
Revisión12102022
Formato / tamaño de archivoPDF / 1.3 Mb
Idioma del documentoInglés

NXP Semiconductors. PEMD12; PUMD12. NPN/PNP resistor-equipped transistors; R1 = 47 k. , R2 = 47 k. Fig 1

NXP Semiconductors PEMD12; PUMD12 NPN/PNP resistor-equipped transistors; R1 = 47 k , R2 = 47 k Fig 1

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NXP Semiconductors PEMD12; PUMD12 NPN/PNP resistor-equipped transistors; R1 = 47 k , R2 = 47 k
006aac749 400 Ptot (mW) 300 200 100 0 -75 -25 25 75 125 175 Tamb (°C) FR4 PCB, standard footprint
Fig 1. Per device: Power derating curve for SOT363 (SC-88) and SOT666 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor
Rth(j-a) thermal resistance from in free air junction to ambient PEMD12 (SOT666) [1][2] - - 625 K/W PUMD12 (SOT363) [1] - - 625 K/W
Per device
Rth(j-a) thermal resistance from in free air junction to ambient PEMD12 (SOT666) [1][2] - - 417 K/W PUMD12 (SOT363) [1] - - 417 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. PEMD12_PUMD12 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 21 November 2011 4 of 16
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Marking 5. Limiting values 6. Thermal characteristics 7. Characteristics 8. Test information 8.1 Quality information 9. Package outline 10. Packing information 11. Soldering 12. Revision history 13. Legal information 13.1 Data sheet status 13.2 Definitions 13.3 Disclaimers 13.4 Trademarks 14. Contact information 15. Contents