Datasheet L6204 (STMicroelectronics) - 6
| Fabricante | STMicroelectronics |
| Descripción | High bandwidth 6 MHz, rail-to-rail, 5 V cost-effective Op Amp |
| Páginas / Página | 17 / 6 — TSL6201, TSL6202, TSL6204. Electrical characteristics |
| Idioma del documento | Inglés |
TSL6201, TSL6202, TSL6204. Electrical characteristics
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TSL6201, TSL6202, TSL6204 Electrical characteristics 3 Electrical characteristics Table 6. Electrical characteristics at VCC = 2.5 V to 5.5 V, VICM = VOUT = VCC / 2, T = 25 °C and OUT connected to VCC / 2 through RL=10 kΩ (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance
T = 25 °C ± 4.5 mV Vio Input offset voltage -40 °C ≤ T ≤ 125 °C ± 7.5 DVio/DT Input offset voltage temperature drift -40 °C ≤ T ≤ 125 °C ±5 µV/°C Iib Input bias current ±1 pA Iio Input offset current ±1 pA AVD Open loop gain VCC-+500 mV ≤ VOUT ≤ VCC+-500 mV 80 89 dB Common-mode rejection ratio CMR VCC-≤ Vicm ≤ VCC+ 58 78 dB 20.log (ΔVio/ΔVicm) High level output voltage drop VOH 40 mV (VOH=VCC+-VOUT) Low level output voltage drop VOL 40 mV (VOL=VOUT) IOUT Short-circuit VCC = 5 V ±30 mA ICC Supply current (by operational amplifier) No load 750 1400 µA
AC performance
GBP Gain bandwidth product RL = 2 kΩ, CL = 100 pF, f = 100 kHz 6 MHz SR Slew rate AV=1 V/V, 10% to 90% 4.5 V/µs Φm Phase margin RL = 2 kΩ, CL = 100 pF 45 Degrees en Input voltage noise density f = 10 kHz 21 nV/√Hz
DS13727
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Rev 1 page 6/17
Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Pin description 1.1 TSL6201 single operational amplifier 1.2 TSL6202 dual operational amplifier 1.3 TSL6204 quad operational amplifier 2 Absolute maximum ratings 3 Electrical characteristics 4 Typical performance characteristics 5 Package information 5.1 SOT23-5 package information 5.2 MiniSO8 package information 5.3 TSSOP-14 package information 6 Ordering information Revision history
T = 25 °C ± 4.5 mV Vio Input offset voltage -40 °C ≤ T ≤ 125 °C ± 7.5 DVio/DT Input offset voltage temperature drift -40 °C ≤ T ≤ 125 °C ±5 µV/°C Iib Input bias current ±1 pA Iio Input offset current ±1 pA AVD Open loop gain VCC-+500 mV ≤ VOUT ≤ VCC+-500 mV 80 89 dB Common-mode rejection ratio CMR VCC-≤ Vicm ≤ VCC+ 58 78 dB 20.log (ΔVio/ΔVicm) High level output voltage drop VOH 40 mV (VOH=VCC+-VOUT) Low level output voltage drop VOL 40 mV (VOL=VOUT) IOUT Short-circuit VCC = 5 V ±30 mA ICC Supply current (by operational amplifier) No load 750 1400 µA
AC performance
GBP Gain bandwidth product RL = 2 kΩ, CL = 100 pF, f = 100 kHz 6 MHz SR Slew rate AV=1 V/V, 10% to 90% 4.5 V/µs Φm Phase margin RL = 2 kΩ, CL = 100 pF 45 Degrees en Input voltage noise density f = 10 kHz 21 nV/√Hz
DS13727
-
Rev 1 page 6/17
Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Pin description 1.1 TSL6201 single operational amplifier 1.2 TSL6202 dual operational amplifier 1.3 TSL6204 quad operational amplifier 2 Absolute maximum ratings 3 Electrical characteristics 4 Typical performance characteristics 5 Package information 5.1 SOT23-5 package information 5.2 MiniSO8 package information 5.3 TSSOP-14 package information 6 Ordering information Revision history