Datasheet 74LVC1G3157 (Nexperia) - 10

FabricanteNexperia
Descripción10 Ohm Single-Pole Double-Throw Analog Switch
Páginas / Página22 / 10 — Nexperia. 74LVC1G3157. 10 Ohm single-pole double-throw analog switch. …
Formato / tamaño de archivoPDF / 337 Kb
Idioma del documentoInglés

Nexperia. 74LVC1G3157. 10 Ohm single-pole double-throw analog switch. 11.1. Waveforms and test circuits

Nexperia 74LVC1G3157 10 Ohm single-pole double-throw analog switch 11.1 Waveforms and test circuits

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 10 link to page 10
Nexperia 74LVC1G3157 10 Ohm single-pole double-throw analog switch 11.1. Waveforms and test circuits
VI Yn or Z VM VM input GND tPLH tPHL VOH Z or Yn VM VM output VOL 001aac361 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 12. Input (Yn or Z) to output (Z or Yn) propagation delays
VI S input VM GND tPLZ tPZL VCC output Yn LOW to OFF VM OFF to LOW V V X OL tPHZ tPZH VOH V output Y Yn HIGH to OFF VM OFF to HIGH GND switch switch switch enabled disabled enabled 001aac362 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 13. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY
1.65 V to 5.5 V 0.5 × VCC 0.5 × VCC VOL + 0.3 V VOH - 0.3 V 74LVC1G3157 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. Al rights reserved
Product data sheet Rev. 10 — 13 April 2023 10 / 22
Document Outline 1. General description 2. Features and benefits 3. Ordering information 4. Marking 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 10.1. Test circuits 10.2. ON resistance 10.3. ON resistance test circuit and graphs 11. Dynamic characteristics 11.1. Waveforms and test circuits 11.2. Additional dynamic characteristics 11.3. Test circuits 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information Contents