Datasheet MAX32625 (Analog Devices) - 10

MAX32625/MAX32626 Ultra-Low-Power Arm Cortex-M4 with FPU-Based Microcontroller (MCU) with 512KB Flash and 160KB SRAM
Electrical Characteristics—ADC
(Internal bandgap reference selected and ADC_SCALE = ADC_REFSCL = 1 unless otherwise specified. Specifications marked GBD are guaranteed by design and not production tested.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Resolution 10 Bits ADC Clock Rate fADC_CLK 0.1 8 MHz ADC Clock Period t 1/fADC_ ADC_CLK μs CLK AIN0-AIN3, ADC_CHSEL = 0–3, BUF_BYPASS = 0 0.05 VDD18 AIN0–AIN1, ADC_CHSEL = 4–5, BUF_BYPASS = 0 0.05 5.5 Input Voltage Range VAIN V AIN0–AIN3, ADC_CHSEL = 0–3, BUF_BYPASS = 1 VSS VDD18 AIN0-AIN1, ADC_CHSEL = 4–5, BUF_BYPASS = 1 VSS 5.5 Input Dynamic Current, ADC active, ADC buffer bypassed 4.5 μA Switched Capacitance IAIN ADC active, ADC buffer enabled 50 nA Fixed capacitance to V Analog Input Capacitance C SS 1 pF AIN Dynamically switched capacitance 250 nF Integral Nonlinearity INL ±2 LSB Differential Nonlinearity DNL ±1 LSB Offset Error VOS ±1 LSB Gain Error GE ±2 LSB Signal-to-Noise Ratio SNR 58.5 dB Signal-to-Noise and Distortion SINAD 58.5 dB Total Harmonic Distortion THD -68.5 dB Spurious Free Dynamic Range SFDR 74 dB ADC Active Current I ADC active, reference buffer enabled, ADC input buffer disabled 240 µA Input Buffer Active Current IINBUF 53 μA Any power-up of ADC clock, ADC bias, reference buffer or input buffer, to 10 µs ADC Setup Time tADC_SU CpuAdcStart Any power-up of ADC clock or ADC bias to CpuAdcStart 48 tACLK ADC Output Latency tADC 1025 tACLK ADC Sample Rate fADC 7.8 ksps AIN0 or AIN1, ADC inactive or channel not selected 0.12 4 ADC Input Leakage IADC_LEAK nA AIN2 or AIN3, ADC inactive or channel not selected 0.02 1 www.maximintegrated.com Maxim Integrated │ 10 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 63 WLP 68 TQFN Electrical Characteristics Electrical Characteristics - ADC Electrical Characteristics - USB Electrical Characteristics - SPI Master / SPIX Master Electrical Characteristics - SPI Slave Electrical Characteristics - I2C Bus Pin Configurations Pin Description Detailed Description MAX32625/MAX32626 ARM Cortex-M4 with FPU Processor Power Operating Modes Low Power Mode 0 (LP0) Low Power Mode 1 (LP1) Low Power Mode 2 (LP2) Low Power Mode 3 (LP3) Analog-to-Digital Converter Pulse Train Engine Clocking Scheme Interrupt Sources Real-Time Clock and Wake-Up Timer General-Purpose I/O and Special Function Pins CRC Module Watchdog Timers Programmable Timers Serial Peripherals USB I2C Master and Slave SPI (Master) SPI (Slave) SPI (Execute in Place (SPIX) Master) UART 1-Wire Master Peripheral Management Unit (PMU) Additional Documentation Development and Technical Support Trust Protection Unit (TPU) (MAX32626 Only) Applications Information General-Purpose I/O Matrix Typical Application Circuit Ordering Information Revision History