Datasheet AS3935 (ScioSense) - 5
| Fabricante | ScioSense |
| Descripción | Franklin Lightning Sensor IC with embedded distance estimation algorithm. |
| Páginas / Página | 44 / 5 — AS3935 −. Pin Assignments. Figure 3: Pin Diagram of AS3935 (Top View). … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
AS3935 −. Pin Assignments. Figure 3: Pin Diagram of AS3935 (Top View). AS3935. Figure 4: Pin Description. Pin Number. Pin Name
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AS3935 −
Pin Assignments The AS3935 Pin assignments are shown below.
Pin Assignments Figure 3: Pin Diagram of AS3935 (Top View)
I MOS 1 0 / D D D C AD AD NC I2 16 15 14 13 ACG 1 12 MISO INN 2 11 I2CL / SCL
AS3935
INP 3 10 IRQ Exposed pad GND 4 9 SI 5 6 7 8 CS VDD VREG EN_VREG
Figure 4: Pin Description Pin Number Pin Name Pin Type Description
1 ACG AC-Ground 2 INN Analog I/O Antenna ground 3 INP Antenna positive input 4 GND Ground 5 VDD Supply pad Positive supply voltage 6 VREG Positive supply voltage / Regulated voltage 7 EN_VREG Voltage Regulator Enable 8 CS Digital input Chip Select (active low) 9 SI Select Interface (GND → SPI or VDD → I²C) 10 IRQ Digital output Interrupt I²C clock bus or SPI clock bus 11 I2CL/SCL Digital input (according to SI setting) 12 MISO Digital output SPI data output bus
Page 4 ams Datasheet
Document Feedback [v1-04] 2016-Jan-13 Document Outline ScioSense_Cover_page AS3935 Data Sheet General Description Key Benefits & Features Applications Block Diagram Pin Assignments Absolute Maximum Ratings Electrical Characteristics Operating Conditions DC/AC Characteristics for Digital Inputs and Outputs Detailed System and Block Specification Typical Operating Characteristics Detailed Description Circuit Operating Modes Power-Down Mode Listening Mode Signal Verification System and Block Specification Register Table Register Table Description and Default Value Serial Peripheral Interface (SPI) SPI Command Structure Writing of Register Data Reading of Data from Addressable Registers (READ Mode) Send Direct Command Byte I²C Guideline for Pull Up Resistors on I2CL and I2CD I²C Byte Write I²C Register Read Direct Command Voltage Regulator Analog Front-End (AFE) and Watchdog Noise Floor Level Measurement and Evaluation Lightning Algorithm Signal Validation Energy Calculation Statistical Distance Estimation Interrupt Management Antenna Tuning Clock Generation Noise Sources to Be Avoided Package Drawings & Markings Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information Content Guide
Pin Assignments The AS3935 Pin assignments are shown below.
Pin Assignments Figure 3: Pin Diagram of AS3935 (Top View)
I MOS 1 0 / D D D C AD AD NC I2 16 15 14 13 ACG 1 12 MISO INN 2 11 I2CL / SCL
AS3935
INP 3 10 IRQ Exposed pad GND 4 9 SI 5 6 7 8 CS VDD VREG EN_VREG
Figure 4: Pin Description Pin Number Pin Name Pin Type Description
1 ACG AC-Ground 2 INN Analog I/O Antenna ground 3 INP Antenna positive input 4 GND Ground 5 VDD Supply pad Positive supply voltage 6 VREG Positive supply voltage / Regulated voltage 7 EN_VREG Voltage Regulator Enable 8 CS Digital input Chip Select (active low) 9 SI Select Interface (GND → SPI or VDD → I²C) 10 IRQ Digital output Interrupt I²C clock bus or SPI clock bus 11 I2CL/SCL Digital input (according to SI setting) 12 MISO Digital output SPI data output bus
Page 4 ams Datasheet
Document Feedback [v1-04] 2016-Jan-13 Document Outline ScioSense_Cover_page AS3935 Data Sheet General Description Key Benefits & Features Applications Block Diagram Pin Assignments Absolute Maximum Ratings Electrical Characteristics Operating Conditions DC/AC Characteristics for Digital Inputs and Outputs Detailed System and Block Specification Typical Operating Characteristics Detailed Description Circuit Operating Modes Power-Down Mode Listening Mode Signal Verification System and Block Specification Register Table Register Table Description and Default Value Serial Peripheral Interface (SPI) SPI Command Structure Writing of Register Data Reading of Data from Addressable Registers (READ Mode) Send Direct Command Byte I²C Guideline for Pull Up Resistors on I2CL and I2CD I²C Byte Write I²C Register Read Direct Command Voltage Regulator Analog Front-End (AFE) and Watchdog Noise Floor Level Measurement and Evaluation Lightning Algorithm Signal Validation Energy Calculation Statistical Distance Estimation Interrupt Management Antenna Tuning Clock Generation Noise Sources to Be Avoided Package Drawings & Markings Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information Content Guide