Datasheet OPA186 (Texas Instruments) - 6

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OPA186, OP A2186, OP A4186
SBOS968C – JUNE 2022 – REVISED JULY 2023
www.ti.com 6.4 Thermal Information: OPA186 OPA186 THERMAL METRIC
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D (SOIC) DBV (SOT-23) UNIT 8 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 135.3 166.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 75.6 62.2 °C/W RθJB Junction-to-board thermal resistance 78.7 38.6 °C/W ΨJT Junction-to-top characterization parameter 25.4 12.1 °C/W ΨJB Junction-to-board characterization parameter 78.0 38.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.5 Thermal Information: OPA2186 OPA2186 THERMAL METRIC
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DDF (SOT-23) D (SOIC) UNIT 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 150.4 128.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 85.6 69.2 °C/W RθJB Junction-to-board thermal resistance 70.0 72.3 °C/W ΨJT Junction-to-top characterization parameter 8.1 20.7 °C/W ΨJB Junction-to-board characterization parameter 69.6 71.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.6 Thermal Information: OPA4186 OPA4186 THERMAL METRIC
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D (SOIC) UNIT 14 PINS
RθJA Junction-to-ambient thermal resistance 84.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 37.4 °C/W RθJB Junction-to-board thermal resistance 41.4 °C/W ΨJT Junction-to-top characterization parameter 6.7 °C/W ΨJB Junction-to-board characterization parameter 40.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA186 OPA2186 OPA4186 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA186 6.5 Thermal Information: OPA2186 6.6 Thermal Information: OPA4186 6.7 Electrical Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Rail-to-Rail Inputs 7.3.2 Phase-Reversal Protection 7.3.3 Input Bias Current Clock Feedthrough 7.3.4 EMI Rejection 7.3.4.1 EMIRR +IN Test Configuration 7.3.5 Electrical Overstress 7.3.6 MUX-Friendly Inputs 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.1.1 Basic Noise Calculations 8.2 Typical Applications 8.2.1 High-Side Current Sensing 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 8.2.2 Bridge Amplifier 8.3 Power Supply Recommendations 8.4 Layout 8.4.1 Layout Guidelines 8.4.2 Layout Example 9 Device and Documentation Support 9.1 Device Support 9.1.1 Development Support 9.1.1.1 PSpice® for TI 9.1.1.2 TINA-TI™ Simulation Software (Free Download) 9.2 Documentation Support 9.2.1 Related Documentation 9.3 Receiving Notification of Documentation Updates 9.4 Support Resources 9.5 Trademarks 9.6 Electrostatic Discharge Caution 9.7 Glossary 10 Mechanical, Packaging, and Orderable Information