Datasheet IKCM15F60HA (Infineon) - 6

Control Integrated POwer System (CIPOS™) IKCM15F60HA It is not recommended for proper work to provide The under-voltage circuit enables the device to input pulse-width lower than 1µs. operate at power on when a supply voltage of at The integrated gate drive provides additionally a least a typical voltage of VDDUV+ = 12.1V is present. shoot through prevention capability which avoids The IC shuts down all the gate drivers power the simultaneous on-state of two gate drivers of the outputs, when the VDD supply voltage is below same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and VDDUV- = 10.4V. This prevents the external power LO3). When two inputs of a same leg are activated, switches from critically low gate voltage levels only former activated one is activated so that the during on-state and therefore from excessive power leg is kept steadily in a safe state. dissipation. A minimum deadtime insertion of typically 380ns is VB(U, V, W) and VS(U, V, W) (High side supplies, Pin also provided by driver IC, in order to reduce cross- 1 - 6) conduction of the external power switches. VB to VS is the high side supply voltage. The high VFO (Fault-output, Pin 14) side circuit can float with respect to VSS following The VFO pin indicates a module failure in case of the external high side power device emitter voltage. under voltage at pin VDD or in case of triggered Due to the low power consumption, the floating over current detection at ITRIP. A pull-up resistor is driver stage is supplied by integrated bootstrap externally required. circuit. The under-voltage detection operates with a rising VDD CIPOSTM supply threshold of typical VBSUV+ = 12.1V and a RON,FLT From ITRIP - Latch VFO falling threshold of VBSUV- = 10.4V. 1 VS(U, V, W) provide a high robustness against VSS From UV detection negative voltage in respect of VSS of -50V Figure 5 transiently. This ensures very stable designs even Internal circuit at pin VFO under rough conditions. NW, NV, NU (Low side emitter, Pin 17 - 19) ITRIP (Over current detection function, Pin 15) The low side emitters are available for current CIPOS™ provides an over current detection measurements of each phase leg. It is recommended to keep the connection to pin VSS as function by connecting the ITRIP input with the short as possible in order to avoid unnecessary IGBT collector current feedback. The ITRIP inductive voltage drops. comparator threshold (typ. 0.47V) is referenced to VSS ground. An input noise filter (typ.: t W, V, U (High side emitter and low side collector, ITRIPMIN = 530ns) prevents the driver to detect false over- Pin 20 - 22) current events. These pins are motor U, V, W input pins. Over current detection generates a shutdown of all P (Positive bus input voltage, Pin 23) outputs of the gate driver after the shutdown propagation delay of typically 1000ns. The high side IGBTs are connected to the bus voltage. It is noted that the bus voltage does not The fault-clear time is set to minimum 40µs. exceed 450V. VDD, VSS (Low side control supply and reference, Pin 13, 16) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. Datasheet 6 of 16 V 2.5 2017-09-06 Document Outline Table of contents CIPOS™ Control Integrated POwer System Features Target Applications Description System Configuration Pin Configuration Internal Electrical Schematic Pin Assignment Pin Description HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12) VFO (Fault-output, Pin 14) ITRIP (Over current detection function, Pin 15) VDD, VSS (Low side control supply and reference, Pin 13, 16) VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) NW, NV, NU (Low side emitter, Pin 17 - 19) W, V, U (High side emitter and low side collector, Pin 20 - 22) P (Positive bus input voltage, Pin 23) Absolute Maximum Ratings Module Section Inverter Section Control Section Recommended Operation Conditions Static Parameters Dynamic Parameters Bootstrap Parameters Mechanical Characteristics and Ratings Switching Times Definition Circuit of a Typical Application Electrical characteristic Package Outline Revision history