Datasheet TEA5767HN (NXP) - 7

NXP Semiconductors TEA5767HN Low-power FM stereo radio for handheld applications 7.4 Crystal oscillator
The crystal oscillator can operate with a 32.768 kHz clock crystal or a 13 MHz crystal. The temperature drift of standard 32.768 kHz clock crystals limits the operational temperature range from −10 °C to +60 °C. The PLL synthesizer can be clocked externally with a 32.768 kHz, a 6.5 MHz or a 13 MHz signal via pin XTAL2. The crystal oscillator generates the reference frequency for:
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The reference frequency divider for the synthesizer PLL
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The timing for the IF counter
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The free-running frequency adjustment of the stereo decoder VCO
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The center frequency adjustment of the IF filters
7.5 PLL tuning system
The PLL synthesizer tuning system is suitable to operate with a 32.768 kHz or a 13 MHz reference frequency generated by the crystal oscillator or applied to the IC from an external source. The synthesizer can also be clocked via pin XTAL2 at 6.5 MHz. The PLL tuning system can perform an autonomous search tuning function.
7.6 RF AGC
The RF AGC prevents overloading and limits the amount of intermodulation products created by strong adjacent channels.
7.7 IF filter
Fully integrated IF filter.
7.8 FM demodulator
The FM quadrature demodulator has an integrated resonator to perform the phase shift of the IF signal.
7.9 Level voltage generator and analog-to-digital converter
The FM IF analog level voltage is converted to 4 bits digital data and output via the bus.
7.10 IF counter
The IF counter outputs a 7-bit count result via the bus.
7.11 Soft mute
The low-pass filtered level voltage drives the soft mute attenuator at low RF input levels. The soft mute function can be switched off via the bus.
7.12 MPX decoder
The PLL stereo decoder is adjustment-free. The stereo decoder can be switched to mono via the bus. TEA5767HN_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 26 January 2007 7 of 40
Document Outline 1. General description 2. Features 3. Quick reference data 4. Ordering information 5. Block diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 7.1 Low-noise RF amplifier 7.2 FM mixer 7.3 VCO 7.4 Crystal oscillator 7.5 PLL tuning system 7.6 RF AGC 7.7 IF filter 7.8 FM demodulator 7.9 Level voltage generator and analog-to-digital converter 7.10 IF counter 7.11 Soft mute 7.12 MPX decoder 7.13 Signal dependent mono to stereo blend 7.14 Signal dependent AF response 7.15 Software programmable ports 7.16 I2C-bus and 3-wire bus 8. I2C-bus, 3-wire bus and bus-controlled functions 8.1 I2C-bus specification 8.1.1 Data transfer 8.1.2 Power-on reset 8.2 I2C-bus protocol 8.3 3-wire bus specification 8.3.1 Data transfer 8.3.2 Power-on reset 8.4 Writing data 8.5 Reading data 9. Internal circuitry 10. Limiting values 11. Thermal characteristics 12. Static characteristics 13. Dynamic characteristics 14. FM characteristics 15. I2C-bus characteristics 16. Test information 17. Package outline 18. Soldering 18.1 Introduction to soldering 18.2 Wave and reflow soldering 18.3 Wave soldering 18.4 Reflow soldering 19. Revision history 20. Legal information 20.1 Data sheet status 20.2 Definitions 20.3 Disclaimers 20.4 Trademarks 21. Contact information 22. Contents