Datasheet J111, J112 (ON Semiconductor) - 6
| Fabricante | ON Semiconductor |
| Descripción | JFET Chopper Transistors in TO-92 package |
| Páginas / Página | 7 / 6 — TO−92 (TO−226). DOCUMENT NUMBER: 98ASB42022B. DESCRIPTION:. PAGE 2 OF 2. … |
| Formato / tamaño de archivo | PDF / 167 Kb |
| Idioma del documento | Inglés |
TO−92 (TO−226). DOCUMENT NUMBER: 98ASB42022B. DESCRIPTION:. PAGE 2 OF 2. onsemi. www.onsemi.com
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TO−92 (TO−226)
CASE 29−11 ISSUE AM DATE 09 MAR 2007 STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: PIN 1. EMITTER PIN 1. BASE PIN 1. ANODE PIN 1. CATHODE PIN 1. DRAIN 2. BASE 2. EMITTER 2. ANODE 2. CATHODE 2. SOURCE 3. COLLECTOR 3. COLLECTOR 3. CATHODE 3. ANODE 3. GATE STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: PIN 1. GATE PIN 1. SOURCE PIN 1. DRAIN PIN 1. BASE 1 PIN 1. CATHODE 2. SOURCE & SUBSTRATE 2. DRAIN 2. GATE 2. EMITTER 2. GATE 3. DRAIN 3. GATE 3. SOURCE & SUBSTRATE 3. BASE 2 3. ANODE STYLE 11: STYLE 12: STYLE 13: STYLE 14: STYLE 15: PIN 1. ANODE PIN 1. MAIN TERMINAL 1 PIN 1. ANODE 1 PIN 1. EMITTER PIN 1. ANODE 1 2. CATHODE & ANODE 2. GATE 2. GATE 2. COLLECTOR 2. CATHODE 3. CATHODE 3. MAIN TERMINAL 2 3. CATHODE 2 3. BASE 3. ANODE 2 STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20: PIN 1. ANODE PIN 1. COLLECTOR PIN 1. ANODE PIN 1. GATE PIN 1. NOT CONNECTED 2. GATE 2. BASE 2. CATHODE 2. ANODE 2. CATHODE 3. CATHODE 3. EMITTER 3. NOT CONNECTED 3. CATHODE 3. ANODE STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: PIN 1. COLLECTOR PIN 1. SOURCE PIN 1. GATE PIN 1. EMITTER PIN 1. MT 1 2. EMITTER 2. GATE 2. SOURCE 2. COLLECTOR/ANODE 2. GATE 3. BASE 3. DRAIN 3. DRAIN 3. CATHODE 3. MT 2 STYLE 26: STYLE 27: STYLE 28: STYLE 29: STYLE 30: PIN 1. V PIN 1. CATHODE PIN 1. NOT CONNECTED PIN 1. DRAIN CC PIN 1. MT 2. GROUND 2 2. SUBSTRATE 2. ANODE 2. ANODE 2. GATE 3. OUTPUT 3. MT 3. GATE 3. CATHODE 3. SOURCE STYLE 31: STYLE 32: STYLE 33: STYLE 34: STYLE 35: PIN 1. GATE PIN 1. BASE PIN 1. RETURN PIN 1. INPUT PIN 1. GATE 2. DRAIN 2. COLLECTOR 2. INPUT 2. GROUND 2. COLLECTOR 3. SOURCE 3. EMITTER 3. OUTPUT 3. LOGIC 3. EMITTER
DOCUMENT NUMBER: 98ASB42022B
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−92 (TO−226) PAGE 2 OF 2 onsemi
and are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
www.onsemi.com 2
© Semiconductor Components Industries, LLC, 1998 www.onsemi.com
CASE 29−11 ISSUE AM DATE 09 MAR 2007 STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5: PIN 1. EMITTER PIN 1. BASE PIN 1. ANODE PIN 1. CATHODE PIN 1. DRAIN 2. BASE 2. EMITTER 2. ANODE 2. CATHODE 2. SOURCE 3. COLLECTOR 3. COLLECTOR 3. CATHODE 3. ANODE 3. GATE STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10: PIN 1. GATE PIN 1. SOURCE PIN 1. DRAIN PIN 1. BASE 1 PIN 1. CATHODE 2. SOURCE & SUBSTRATE 2. DRAIN 2. GATE 2. EMITTER 2. GATE 3. DRAIN 3. GATE 3. SOURCE & SUBSTRATE 3. BASE 2 3. ANODE STYLE 11: STYLE 12: STYLE 13: STYLE 14: STYLE 15: PIN 1. ANODE PIN 1. MAIN TERMINAL 1 PIN 1. ANODE 1 PIN 1. EMITTER PIN 1. ANODE 1 2. CATHODE & ANODE 2. GATE 2. GATE 2. COLLECTOR 2. CATHODE 3. CATHODE 3. MAIN TERMINAL 2 3. CATHODE 2 3. BASE 3. ANODE 2 STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20: PIN 1. ANODE PIN 1. COLLECTOR PIN 1. ANODE PIN 1. GATE PIN 1. NOT CONNECTED 2. GATE 2. BASE 2. CATHODE 2. ANODE 2. CATHODE 3. CATHODE 3. EMITTER 3. NOT CONNECTED 3. CATHODE 3. ANODE STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: PIN 1. COLLECTOR PIN 1. SOURCE PIN 1. GATE PIN 1. EMITTER PIN 1. MT 1 2. EMITTER 2. GATE 2. SOURCE 2. COLLECTOR/ANODE 2. GATE 3. BASE 3. DRAIN 3. DRAIN 3. CATHODE 3. MT 2 STYLE 26: STYLE 27: STYLE 28: STYLE 29: STYLE 30: PIN 1. V PIN 1. CATHODE PIN 1. NOT CONNECTED PIN 1. DRAIN CC PIN 1. MT 2. GROUND 2 2. SUBSTRATE 2. ANODE 2. ANODE 2. GATE 3. OUTPUT 3. MT 3. GATE 3. CATHODE 3. SOURCE STYLE 31: STYLE 32: STYLE 33: STYLE 34: STYLE 35: PIN 1. GATE PIN 1. BASE PIN 1. RETURN PIN 1. INPUT PIN 1. GATE 2. DRAIN 2. COLLECTOR 2. INPUT 2. GROUND 2. COLLECTOR 3. SOURCE 3. EMITTER 3. OUTPUT 3. LOGIC 3. EMITTER
DOCUMENT NUMBER: 98ASB42022B
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−92 (TO−226) PAGE 2 OF 2 onsemi
and are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
www.onsemi.com 2
© Semiconductor Components Industries, LLC, 1998 www.onsemi.com