Datasheet A4988 (Allegro)

FabricanteAllegro
DescripciónDMOS Microstepping Driver with Integrated Translator, 1/16th Step Resolution, and Automatic Decay Selection in 28-QFN (4x5) package
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A4988. DMOS Microstepping Driver. with Translator and Overcurrent Protection. FEATURES AND BENEFITS. DESCRIPTION. PACKAGE:

Datasheet A4988 Allegro

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A4988 DMOS Microstepping Driver with Translator and Overcurrent Protection FEATURES AND BENEFITS DESCRIPTION
▪ Low Rds(on) outputs The A4988 is a complete microstepping motor driver with ▪ Automatic current decay mode detection/selection built-in translator for easy operation. It is designed to operate ▪ Mixed and slow current decay modes bipolar stepper motors in full-, half-, quarter-, eighth-, and ▪ Synchronous rectification for low power dissipation sixteenth-step modes, with an output drive capacity of up to ▪ Internal UVLO 35 V and ±2 A. The A4988 includes a fixed off-time current ▪ Crossover-current protection regulator which has the ability to operate in slow or mixed ▪ 3.3 and 5 V compatible logic supply decay modes. ▪ Thermal shutdown circuitry ▪ Short-to-ground protection The translator is the key to the easy implementation of the ▪ Shorted load protection A4988. Simply inputting one pulse on the STEP input drives ▪ Five selectable step modes: full, 1/ the motor one microstep. There are no phase sequence tables, 2, 1/4, 1/8, and 1/16 high-frequency control lines, or complex interfaces to program.
PACKAGE:
The A4988 interface is an ideal fit for applications where a complex microprocessor is unavailable or is overburdened. 28-contact QFN During stepping operation, the chopping control in the A4988 with exposed thermal pad automatical y selects the current decay mode: slow or mixed. In 5 mm × 5 mm × 0.90 mm (ET package) mixed decay mode, the device is set initially to a fast decay for a proportion of the fixed off-time, then to a slow decay for the remainder of the off-time. Mixed decay current control results in reduced audible motor noise, increased step accuracy, and reduced power dissipation. Not to scale Continued on the next page…
TYPICAL APPLICATION DIAGRAM
V 0.1 µF 0.1 µF DD 0.22 µF VREG ROSC CP1 CP2 VCP VBB1 0.22 µF VDD 100 µF VBB2 5 kΩ Microcontroller or SLEEP OUT1A Controller Logic A4988 OUT1B STEP SENSE1 MS1 MS2 MS3 OUT2A DIR ENABLE OUT2B RESET SENSE2 VREF GND GND 4988-DS, Rev. 8 April 5, 2022 MCO-0000827