Datasheet LTC7891 (Analog Devices) - 8

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LTC7891 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions (Continued) Pin No. Mnemonic Description
12 BGUP High Current Gate Driver Pull-Up for Bottom FET. BGUP pulls up to DRVCC. Tie BGUP directly to the bottom FET gate for maximum gate drive transition speed on the gate rising edge. Tie a resistor between BGUP and the bottom FET gate to adjust the gate rising slew rate. BGUP also serves as the Kelvin sense of the bottom FET gate during turn off. 13 BGDN High Current Gate Driver Pull-Down for Bottom FET. BGDN pulls down to GND. Tie BGDN directly to the bottom FET gate for maximum gate drive transition speed on the gate falling edge. Tie a resistor between BGDN and the bottom FET gate to adjust the gate falling slew rate. BGDN also serves as the Kelvin sense of the bottom FET gate during turn on. 14 BOOST Bootstrapped Supply to the Top Side Floating Driver. Connect a capacitor between the BOOST and SW pins. An internal switch provides power to the BOOST pin from DRVCC when the bottom FET turns on. The voltage swing at the BOOST pin is from DRVCC to (VIN + DRVCC). 15 SW Switch Node Connection to Inductor. 16 TGDN High Current Gate Driver Pull-Down for Top FET. TGDN pulls down to SW. Tie TGDN directly to the top FET gate for maximum gate drive transition speed on the gate falling edge. Tie a resistor between TGDN and the top FET gate to adjust the gate falling slew rate. 17 TGUP High Current Gate Driver Pull-Up for Top FET. TGUP pulls up to BOOST. Tie TGUP directly to the top FET gate for maximum gate drive transition speed on the gate rising edge. Tie a resistor between TGUP and the top FET gate to adjust the gate rising slew rate. 18 PGOOD Power Good Open-Drain Logic Output. PGOOD is pulled to GND when the voltage on VFB is not within ±10% of its set point. 19 ILIM Current Comparator Sense Voltage Range Input. Tying ILIM to GND or INTVCC or floating ILIM sets the maximum current sense threshold to one three different levels (25 mV, 75 mV, and 50 mV, respectively). 20 ITH Error Amplifier Output and Switching Regulator Compensation Point. The current comparator trip point increases with this control voltage. 21 VFB Error Amplifier Feedback Input. If VPRG is floating, VFB receives the remotely sensed feedback voltage from an external resistive divider across the output. If VPRG is tied to GND or INTVCC, VFB receives the remotely sensed output voltage directly. 22 SENSE+ The Positive Input to the Differential Current Comparator. The ITH pin voltage and controlled offset between the SENSE− and SENSE+ pins, in conjunction with the current sense resistor (RSENSE), set the current trip threshold. 23 SENSE− The Negative Input to the Differential Current Comparator. The SENSE− pin supplies current to the current comparator when SENSE– is greater than INTVCC. When SENSE– is 3.2 V or greater, the pin supplies the majority of the sleep mode quiescent current instead of VIN, further reducing the input referred quiescent current. 24 DTCB Dead Time Control Pin for Top FET Off to Bottom FET On Delay. Connect DTCB to GND to program an adaptive dead time delay of approximately 20 ns. Connect DTCB to INTVCC to program a smart near zero delay between SW falling and BGDN rising. Connect a 10 kΩ to 200 kΩ resistor between DTCB and GND to add additional delay (from 7 ns to 60 ns) between SW falling and BGDN rising. 25 DTCA Dead Time Control Pin for Bottom FET Off to Top FET On Delay. Connect DTCA to GND to program an adaptive dead time delay of approximately 20 ns. Connect DTCA to INTVCC to program a smart near zero delay between BGUP falling and SW rising. Connect a 10 kΩ to 200 kΩ resistor between DTCA and GND to add additional delay (from 7 ns to 60 ns) between BGUP falling and SW rising. 26 DRVSET INTVCC Regulation Program Pin. DRVSET sets the regulation point for the INTVCC LDO linear regulators. Connect DRVSET to GND to set INTVCC to 5 V. Connect DRVSET to INTVCC to set INTVCC to 5.5 V. Program voltages between 4 V and 5.5 V by placing a resistor (50 kΩ to 110 kΩ) between DRVSET and GND. The resistor and an internal 20 µA source current create a voltage used by the INTVCC LDO regulator to set the regulation point. 27 DRVUV DRVCC UVLO and EXTVCC Switchover Program Pin. DRVUV determines the INTVCC UVLO and EXTVCC switchover rising and falling thresholds, as listed in Table 1. 28 RUN Run Control Input for the Controller. Forcing RUN below 1.08 V disables controller switching. Forcing RUN below 0.7 V shuts down the LTC7891, reducing quiescent current to approximately 1 µA. Tie the RUN pin to VIN for always on operation. 29 GND (EPAD) Ground (Exposed Pad). The exposed pad must be soldered to PCB GND for rated electrical and thermal performance.
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Document Outline Features Applications Typical Application Circuit General Description Specifications Electrical Characteristics Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Functional Diagram Main Control Loop Power and Bias Supplies (VIN, EXTVCC, DRVCC, and INTVCC) High-Side Bootstrap Capacitor Dead Time Control (DTCA and DTCB Pins) Startup and Shutdown (RUN and TRACK/SS Pins) Light Load Operation: Burst Mode Operation, Pulse Skipping Mode, or Forced Continuous Mode (MODE Pin) Frequency Selection, Spread Spectrum, and Phase-Locked Loop (FREQ and PLLIN/SPREAD Pins) Output Overvoltage Protection Foldback Current Power Good Applications Information Inductor Value Calculation Inductor Core Selection Current Sense Selection Low Value Resistor Current Sensing Inductor DCR Current Sensing Setting the Operating Frequency Selecting the Light Load Operating Mode Dead Time Control (DTCA and DTCB Pins) DTCx Pins Tied to GND (Adaptive Dead Time Control) DTCx Pins Tied to INTVCC (Smart Near Zero Dead Time Control) DTCx Pins Connected with a Resistor to GND Power FET Selection CIN and COUT Selection Setting the Output Voltage RUN Pin and Undervoltage Lockout Soft Start and Tracking (TRACK/SS Pin) INTVCC Regulators (OPTI-DRIVE) Topside FET Driver Supply (CB) Minimum On Time Considerations Fault Conditions: Current Limit and Foldback Fault Conditions: Overvoltage Protection Fault Conditions: Overtemperature Protection Phase-Locked Loop and Frequency Synchronization Efficiency Considerations Checking Transient Response Design Example PCB Layout Checklist PCB Layout Debugging Typical Applications Related Products Outline Dimensions Ordering Guide Evaluation Boards Automotive Products