Datasheet 74AVC1T45FU (Toshiba) - 10

74AVC1T45FU 11.8. AC Characteristics (Note) (VCCA = 1.5 ± 0.1 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 11.7 10.1 9.1 7.4 6.9 6.6 6.5 ns Propagation delay time (B → A) 13.8 11.6 9.3 7.4 6.8 5.9 5.7 3-state output disable time (DIR → A) tPLZ/tPHZ 8.5 8.4 8.4 8.4 8.4 8.3 8.2 3-state output disable time (DIR → B) 24.2 19.7 11.6 10.1 9.6 7.8 7.9 3-state output enable time (DIR → A) tPZL/tPZH 38.0 31.3 20.9 17.5 16.4 13.7 13.6 3-state output enable time (DIR → B) (Note 1) 20.2 18.5 17.5 15.8 15.3 14.9 14.7 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.9. AC Characteristics (Note) (VCCA = 1.8 ± 0.15 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 10.7 9.1 8.5 6.8 6.2 5.8 5.7 ns Propagation delay time (B → A) 13.2 11.4 8.7 6.9 6.2 5.3 4.7 3-state output disable time (DIR → A) tPLZ/tPHZ 7.3 7.3 7.3 7.3 7.3 7.3 7.2 3-state output disable time (DIR → B) 25.2 21.6 11.0 8.9 8.6 7.0 7.0 3-state output enable time (DIR → A) tPZL/tPZH 38.4 33.0 19.7 15.8 14.8 12.3 11.7 3-state output enable time (DIR → B) (Note 1) 18.0 16.4 15.8 14.1 13.5 13.1 12.9 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.10. AC Characteristics (Note) (VCCA = 2.5 ± 0.2 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 10.1 8.6 7.8 5.9 5.3 4.7 4.5 ns Propagation delay time (B → A) 13.5 10.9 8.7 6.6 5.8 4.7 4.1 3-state output disable time (DIR → A) tPLZ/tPHZ 5.6 5.6 5.6 5.6 5.6 5.6 5.6 3-state output disable time (DIR → B) 28.5 22.9 10.9 7.6 7.1 5.9 6.1 3-state output enable time (DIR → A) tPZL/tPZH 42.0 33.8 19.6 14.2 12.9 10.6 10.2 3-state output enable time (DIR → B) (Note 1) 15.7 14.2 13.4 11.5 10.9 10.3 10.1 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) ©2026 10 Toshiba Electronic Devices & Storage Corporation 2026-04-21 Rev.2.0.A