Datasheet TLVx197-Q1: TLV197-Q1, TLV2197-Q1, TLV4197-Q1 (Texas Instruments) - 8

TLV197-Q1 , TLV2197-Q1 , TLV4197-Q1
SBOS935B – APRIL 2020 – REVISED JULY 2020
www.ti.com 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
at TA = +25°C, VCM = VOUT = VS / 2, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE
VOS Input offset voltage ±5 ±500 µV dVOS/dT Input offset voltage drift TA = –40°C to +125°C ±1 ±5 µV/°C Power-supply rejection PSRR T ratio A = –40°C to +125°C ±0.3 ±1.0 µV/V
INPUT BIAS CURRENT
±5 ±20 pA IB Input bias current TA = –40°C to +125°C ±5 nA ±2 ±20 pA IOS Input offset current TA = –40°C to +125°C ±2 nA
NOISE
(V–) – 0.1 V < VCM < (V+) – 3 V f = 0.1 Hz to 10 Hz 1.3 En Input voltage noise µVPP (V+) – 1.5 V < VCM < (V+) + 0.1 V f = 0.1 Hz to 10 Hz 4 f = 100 Hz 10.5 (V–) – 0.1 V < VCM < (V+) – 3 V Input voltage noise f = 1 kHz 5.5 en nV/√Hz density f = 100 Hz 32 (V+) – 1.5 V < VCM < (V+) + 0.1 V f = 1 kHz 12.5 Input current noise in f = 1 kHz 1.5 fA/√Hz density
INPUT VOLTAGE
Common-mode voltage VCM (V–) – 0.1 (V+) + 0.1 V range (V–) – 0.1 V < VCM < (V+) – 3 V 120 140 Common-mode (V–) < VCM < (V+) – 3 V TA = –40°C to +125°C 114 126 CMRR dB rejection ratio 100 120 (V+) – 1.5 V < VCM < (V+) TA = –40°C to +125°C 86 100
INPUT IMPEDANCE
ZID Differential 100 || 1.6 MΩ || pF 1013Ω || ZIC Common-mode 1 || 6.4 pF 8 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TLV197-Q1 TLV2197-Q1 TLV4197-Q1 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: TLV197-Q1 6.5 Thermal Information: TLV2197-Q1 6.6 Thermal Information: TLV4197-Q1 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V) 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V) 6.9 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Protection Circuitry 7.3.2 EMI Rejection 7.3.3 Phase Reversal Protection 7.3.4 Thermal Protection 7.3.5 Capacitive Load and Stability 7.3.6 Common-Mode Voltage Range 7.3.7 Electrical Overstress 7.3.8 Overload Recovery 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 16-Bit Precision Multiplexed Data-Acquisition System 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 8.2.2 Slew-Rate Limit for Input Protection 8.2.3 Precision Reference Buffer 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Examples 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI (Free Software Download) 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Related Links 11.4 Receiving Notification of Documentation Updates 11.5 Support Resources 11.6 Trademarks 11.7 Electrostatic Discharge Caution 11.8 Glossary 12 Mechanical, Packaging, and Orderable Information