Data SheetLT8418Timing DiagramstRPD_TGtFPD_TGINTINTINBTGTGINBBGBGtDMRtDMFtFPD_BGtRPD_BG 002 Figure 2. Timing Definitions of Propagation Delay and Delay MatchingABSOLUTE MAXIMUM RATINGS TA = 25°C1, unless otherwise specified. Table 2. Absolute Maximum RatingsPARAMETERRATING INB, INT –0.3V to 15V VCC, (BST – SW) –0.3V to 6V BGP, BGN –0.3V to VCC + 0.3V TGP, TGN SW – 0.3V to BST + 0.3V BST –0.3V to 106V BST (at 100ms Transient) –0.3V to 116V SW -5V to 100V SW (at 100ms Transient) -5V to 110V Operating Junction Temperature Range2,3 LT8418A -40°C to 125°C Storage Temperature Range -65°C to 150°C . 1 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. 2 The LT8418 is tested under pulsed load conditions such that TJ ≈ TA. The LT8418A is guaranteed to meet specifications from –40°C to 125°C junction temperature. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance, and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • JA), where θJA (in °C/W) is the package thermal impedance. 3 The LT8418 includes overtemperature protection intended to protect the device during momentary overload conditions. The maximum rated junction temperature is exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. analog.com Rev 0 5 of 19 Document Outline Features Applications General Description Typical Application TABLE OF CONTENTS Revision History Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance Pin Configurations and Function Descriptions Pin Descriptions Block diagram Typical Performance Characteristics Theory of Operation 1.1. Chip Start-up, VCC UVLO/OVLO Protections 1.2. Input Interface INT, INB 1.3. Smart Bootstrap (BST) Switch and BST UVLO 1.4. Split Gate Driver Applications Information 1.1. Selecting the VCC and BST Capacitor 1.2. Selecting the Gate Resistance 1.3. Power Dissipation 1.4. PCB Bypass and Grounding Guideline 1.5. Soldering Guideline Outline Dimensions Typical Applications Ordering Guide Related Parts