link to page 10 link to page 10 link to page 10 link to page 10 link to page 8 link to page 10 link to page 10 link to page 6 link to page 11 link to page 11 SSM2166Data Sheet The performance of the rms level detector is illustrated for a Compression Ratio CAVG of 2.2 μF in Figure 17 and for a CAVG of 22 μF in Figure 18. Changing the scaling of the control signal fed to the VCA causes a In each of these images, the input signal to the SSM2166 (not change in the circuit compression ratio, r. This effect is shown shown) is a series of tone bursts in six successive 10 dB steps. in Figure 20. The compression ratio can be set by connecting a The tone bursts range from −66 dBV (0.5 mV rms) to −6 dBV resistor between the COMP RATIO SET pin (Pin 10) and GND. (0.5 V rms). As shown in Figure 17 and Figure 18, the attack Lowering RCOMP gives smaller compression ratios as shown in time of the rms level detector is dependent only on CAVG, but the Figure 19, with values of approximately 0.17 kΩ or less resulting release times are linear ramps whose decay times are dependent in a compression ratio of 1:1. AGC performance is achieved on both CAVG and the input signal step size. The rate of release is with compression ratios between 2:1 and 15:1 and is dependent approximately 240 dB/s for a CAVG of 2.2 μF and 12 dB/s for a on the application. A 100 kΩ potentiometer can be used to CAVG of 22 μF. allow this parameter to be adjusted. 100mVCOMPRESSIONRATIO100 • • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •–6dBVROTATION POINT1:12:15:110:115:190100mV rms0.18.719.445395300mV rms0.18.719.445N/A 31 0 1V rms0.18.719.445N/A 7- 35 TYPICAL R 00 COMP VALUES IN kΩ. Figure 19. Compression Ratio vs. RCOMP (Pin 10 to GND) –66dBV1015:10% • • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •–85dBV5:1 7 01 100ms 7- 35 2:1VCA GAIN 00 Figure 17. RMS Level Detector Performance with CAVG = 2.2 μF 1:1B) d (100mV1sUT P UT100 • • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •–6dBVO9011 19 V–66dBVDEINPUT (dB)VRP 0 7- 35 00 10 Figure 20. Effect of Varying the Compression Ratio 0% • • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •• • • •–85dBV 8 Rotation Point 01 7- 35 00 An internal dc reference voltage in the control circuitry, used to Figure 18. RMS Level Detector Performance with CAVG = 22 μF set the rotation point, is user specified, as illustrated in Figure 9. CONTROL CIRCUITRY The effect on rotation point is shown in Figure 21. By varying a resistor, RROT PT, connected between the positive supply and the The output of the rms level detector is a signal proportional to ROTATION SET pin (Pin 11), the rotation point may be varied the log of the true rms value of the buffer output with an added by approximately 20 mV rms to 1 V rms. From Figure 21, the dc offset. The control circuitry subtracts a dc voltage from this rotation point is inversely proportional to RROT PT. For example, a signal, scales it, and sends the result to the VCA to control the 1 kΩ resistor typically sets the rotation point at 1 V rms, gain. The gain control of the VCA is logarithmic—a linear change whereas a 55 kΩ resistor typically sets the rotation point at in the control signal causes a decibel change in gain. It is this approximately 30 mV rms. control law that allows linear processing of the log rms signal to provide the flat compression characteristic on the input/output characteristic shown in Figure 15. Rev. F | Page 10 of 13 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AND TYPICAL SPEECH APPLICATION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION SIGNAL PATH LEVEL DETECTOR CONTROL CIRCUITRY Compression Ratio Rotation Point VCA Gain Setting and Muting Downward Expansion Threshold POWER-DOWN FEATURE PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE