IRFP450N, SiHFP450N Vishay Siliconix THERMAL RESISTANCE RATINGSPARAMETER SYMBOLTYP.MAX.UNIT Maximum Junction-to-Ambient RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - °C/W Maximum Junction-to-Case (Drain) RthJC - 0.64 SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOLTESTCONDITIONSMIN.TYP.MAX.UNITStatic Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 500 - - V VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA VDS = 500 V, VGS = 0 V - - 25 Zero Gate Voltage Drain Current IDSS µA VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 8.4 Ab - - 0.37 Ω Forward Transconductance gfs VDS = 50 V, ID = 8.4 A 7.9 - - S Dynamic Input Capacitance Ciss - 2260 - VGS = 0 V, Output Capacitance Coss VDS = 25 V, - 210 - f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance Crss - 14 - pF VDS = 1.0 V, f = 1.0 MHz - 2410 - Output Capacitance Coss VGS = 0 V VDS = 400 V, f = 1.0 MHz - 59 - Effective Output Capacitance Coss eff. VDS = 0 V to 400 Vc - 110 - Total Gate Charge Qg - - 77 I Gate-Source Charge Qgs V D = 14 A, VDS = 400 V, GS = 10 V - - 26 nC see fig. 6 and 13b Gate-Drain Charge Qgd - - 34 Turn-On Delay Time td(on) - 20 - Rise Time tr VDD = 250 V, ID = 14 A - 63 - R ns G = 6.2 Ω,VGS = 10 V, Turn-Off Delay Time td(off) - 29 - see fig. 10b Fall Time tf - 25 - Drain-Source Body Diode Characteristics MOSFET symbol Continuous Source-Drain Diode Current I D S - - 14 showing the A integral reverse G Pulsed Diode Forward Currenta ISM - - 56 p - n junction diode S Body Diode Voltage VSD TJ = 25 °C, IS = 14 A, VGS = 0 Vb - - 1.4 V Body Diode Reverse Recovery Time trr - 430 650 ns TJ = 25 °C, IF = 14 A, dI/dt = 100 A/µsb Body Diode Reverse Recovery Charge Qrr - 3.7 5.6 µC Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 400 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com Document Number: 91232 2 S-Pending-Rev. b, 26-Jun-08 Document Outline Datasheet Disclaimer