Datasheet RX74M (Renesas) - 4

RX74M Group 1. Overview
Table 1.1 Outline of Specifications (3/10) Classification Module/Function Description
Resets Sixteen types of reset RES# pin reset: Triggered when the RES# pin is driven low. Power-on reset: Triggered when the RES# pin is driven high and VCC rises above specific levels. Core voltage monitoring reset: Triggered when the core voltage falls below or rises above specific levels. Voltage-monitoring 0 reset: Triggered when VCC falls below specific levels. Voltage-monitoring 1, 2, 4, and 5 resets: Triggered when VCC falls below or rises above specific levels. Temperature-monitoring reset: Triggered due to the detection of temperatures outside the specified range. Deep software standby reset: Triggered in response to an interrupt to trigger release from deep software standby. Independent watchdog timer reset: Triggered when the independent watchdog timer underflows, or a refresh error occurs. Watchdog timer reset: Triggered when the watchdog timer underflows, or a refresh error occurs. Software reset: Triggered by register setting. Bus error reset: Triggered in response to an illicit address or size error Common memory error reset: Triggered in response to an ECC error in the RAM Local memory error reset: Triggered in response to an ECC error in the CPU cache or local RAM Reset output is available. Power-on reset If the RES# pin is at the high level when power is supplied, an internal reset is generated. After VCC has exceeded the voltage detection level and the specified period has elapsed, the reset is cancelled. Programmable voltage detection circuit Monitors the voltage being input to the VCC pins and generates an internal reset or (PVD) interrupt. Voltage detection circuit 0 Capable of generating an internal reset The option-setting memory can be used to select enabling or disabling of the reset. Voltage detection level: Selectable from seven different levels (2.85 V, 2.58 V, 2.15 V, 2.00 V, 1.90 V, 1.80 V, 1.67 V) Voltage detection circuits 1, 2, 4 and 5 Voltage detection level: Selectable from twelve different levels (3.14 V, 3.10 V, 3.08 V, 2.85 V, 2.83 V, 2.80 V, 2.62 V, 2.33 V, 1.90 V, 1.86 V, 1.74 V, 1.71 V) Digital filtering (1/2, 1/4, 1/8, and 1/16 LOCO frequency) Capable of generating an internal reset Two types of timing are selectable for release from reset An internal interrupt can be requested only from voltage detection circuits 1 and 2. Detection of voltage rising above and falling below thresholds is selectable. Maskable or non-maskable interrupt is selectable Voltage detection monitoring Event linking Low power Low power consumption Module stop function consumption function Seven low power consumption modes Sleep mode, deep sleep mode, software standby modes 1 and 2, and deep software standby modes 1 to 3 Battery backup function When the voltage on the VCC pin drops below a certain point, battery power from the VBATT pin is supplied to the backup power area. Backup power area: sub clock oscillator real-time clock backup register Tamper detection Detection of voltage drop in the backup power area R01DS0433EJ0110 Rev.1.10 Page 4 of 299 Jul 31, 2026 Document Outline Features 1. Overview 1.1 Outline of Specifications 1.2 List of Products 1.3 Block Diagram 1.4 Pin Functions 1.5 Pin Assignments 1.5.1 320-Pin LFBGA 1.5.2 224-Pin LFBGA 1.5.3 176-Pin LFBGA 1.5.4 176-Pin LFQFP 1.5.5 144-Pin LFQFP 1.5.6 100-Pin LFQFP 1.6 List of Pin and Pin Functions 1.6.1 320-Pin LFBGA 1.6.2 224-Pin LFBGA 1.6.3 176-Pin LFBGA 1.6.4 176-Pin LFQFP 1.6.5 144-Pin LFQFP 1.6.6 100-Pin LFQFP 2. Electrical Characteristics 2.1 Test Conditions 2.1.1 Maximum and Minimum Values (Max./Min.) 2.1.2 Typical Values (Typ.) 2.2 Absolute Maximum Ratings 2.3 Recommended Operating Conditions 2.4 DC Characteristics 2.4.1 Characteristics of the Input Voltage of the I/O Pins 2.4.2 Characteristics of the Output Voltage of the I/O Pins 2.4.3 Characteristics of the Other I/O Pins 2.4.4 Operating and Standby Currents 2.4.4.1 Operating and Standby Currents for Product Part No. R5K574Mxy4xx (y = A, B, C, D, T, U, V, W) 2.4.4.2 Operating and Standby Currents for Product Part No. R5K574Mxy4xx (y = E, F) 2.4.4.3 Currents in Deep Software Standby Mode 2.4.4.4 Other Operating Currents 2.4.4.5 Permissible Output Currents 2.4.5 Thermal Characteristics 2.4.5.1 Thermal Resistance Value 2.4.5.2 Supply Currents for the Peripheral Functions 2.4.5.3 Example of Calculation of Ta 2.4.6 VCC Rising and Falling Slopes and Ripple Frequency 2.5 AC Characteristics 2.5.1 Operating Frequency 2.5.2 Clock Timing 2.5.3 Reset Timing 2.5.4 Timing of Return from Low Power Consumption Modes 2.5.5 Control Signal Timing 2.5.6 Bus Timing 2.5.7 Timing of On-Chip Peripheral Modules 2.5.7.1 I/O Port 2.5.7.2 TMR 2.5.7.3 CMTW 2.5.7.4 POEG 2.5.7.5 GPTW 2.5.7.6 RSCI 2.5.7.7 RSPIA 2.5.7.8 XSPI 2.5.7.9 RIICHS 2.5.7.10 RI3C 2.5.7.11 SSIE 2.5.7.12 SD/MMC Host Interface 2.5.7.13 PDC 2.5.7.14 HRPWM 2.5.7.15 CANFD/CANFDG 2.5.7.16 ESC 2.5.7.17 ESWM 2.5.7.18 PDMIF 2.5.7.19 Δ-Σ Interface 2.5.7.20 PCIF 2.5.7.21 PIO 2.5.7.22 A/D Converter Trigger 2.5.7.23 CAC 2.6 USB Characteristics 2.6.1 USB Timing 2.6.2 USBHS Timing 2.7 A/D Conversion Characteristics 2.7.1 Analog Input Voltage Range 2.7.2 Common Characteristics of the 16-Bit A/D Converter 2.7.3 SAR Mode Characteristics 2.7.4 Common Characteristics of Oversampling Mode and Hybrid Mode 2.7.5 Oversampling Mode Characteristics 2.7.6 Hybrid Mode Characteristics 2.8 D/A Conversion Characteristics 2.9 Temperature Sensor Characteristics 2.10 Power-on Reset Circuit and Voltage Detection Circuit Characteristics 2.11 Core Voltage Monitoring Reset Characteristics 2.12 Oscillation Stop Detection Timing 2.13 External VDD Timing Characteristics 2.14 Battery Backup Function Characteristics 2.15 MRAM Characteristics 2.15.1 Code MRAM Characteristics 2.15.2 Option-Setting Memory (MRAM Area) Characteristics 2.15.3 Option-Setting Memory (OTP Area with ECC) Characteristics 2.15.4 Option-Setting Memory (OTP Area without ECC) Characteristics 2.15.5 MACI Command Characteristics 2.15.6 W-HUK Zeroization Characteristics 2.15.7 MRAM Magnetic Field Resistance Characteristics 2.15.8 Data MRAM Characteristics 2.16 Boundary Scan 2.17 Usage Note 2.17.1 Connecting VCL Capacitor and Bypass Capacitors Appendix 1. Package Dimensions REVISION HISTORY General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products Notice