Datasheet RX74N (Renesas) - 8

RX74N Group 1. Overview
Table 1.1 Outline of Specifications (7/10) Classification Module/Function Description
Communications USB 2.0 full-speed host/ Includes a USB device controller (UDC) and transceiver for USB 2.0 FS functions function module (USBf) One port Compliant with the USB 2.0 specification Transfer rate: Full speed (12 Mbps), low speed (1.5 Mbps) (host only) Both self-powered mode and bus-powered mode are supported On-the-Go (OTG) operation is possible (low-speed is not supported) Incorporates 2 Kbytes of RAM as a transfer buffer External pull-up and pull-down resistors are not required USB 2.0 high-speed Includes a USB device controller (UDC) and transceiver for USB 2.0 HS host/function module One port (320-pin/224-pin/176-pin products only) (USBHS) Compliant with the USB 2.0 specification Transfer rate: High speed (480 Mbps), full speed (12 Mbps), low speed (1.5 Mbps) (host only) Both self-powered mode and bus-powered mode are supported On-the-Go (OTG) operation is possible (low-speed is not supported) Compliant with Battery Charging Specification Revision 1.2 (BC1.2) Incorporates 8.5 Kbytes of RAM as a transfer buffer External pull-up and pull-down resistors are not required Serial communications 13 channels interface (RSCI) Serial communications modes: Asynchronous, clock synchronous, and smart-card interface Multi-processor function On-chip baud rate generator allows selection of the desired bit rate Choice of LSB-first or MSB-first transfer Start-bit detection: Level or edge detection is selectable. Simple I2C Simple SPI 9-bit transfer mode Bit rate modulation Double-speed mode Average transfer rate clock can be input from TMR timers Event linking by the ELC Supports the serial communications protocol, which contains the start frame and information frame Supports the LIN format Data can be transmitted or received in sequence by the 16-byte FIFO buffers of the transmission and reception unit Manchester encoding is supported. RSCI has some home bus system (HBS) functionality. Data match detection Adjustment of the timing of sampling of the RXD signals I3C bus interface (RI3C) Single channel (I2C/I3C) I2C protocol mode Communication formats: I2C-bus format/SMBus format Supports the multi-master Max. transfer rate: 3.4 Mbps I3C protocol mode Communication protocols: SDR mode, Legacy I2C message support Supports the multi-master Max. transfer rate: 12 Mbps Event linking by the ELC High-speed I2C-bus Two channels (I2C only) interface (RIICHS) I2C-bus interface Communication formats: I2C-bus format/SMBus format Supports the multi-master Max. transfer rate: 3.4 Mbps R01DS0434EJ0110 Rev.1.10 Page 8 of 285 Jul 31, 2026 Document Outline Features 1. Overview 1.1 Outline of Specifications 1.2 List of Products 1.3 Block Diagram 1.4 Pin Functions 1.5 Pin Assignments 1.5.1 320-Pin LFBGA 1.5.2 224-Pin LFBGA 1.5.3 176-Pin LFBGA 1.5.4 176-Pin LFQFP 1.5.5 144-Pin LFQFP 1.5.6 100-Pin LFQFP 1.6 List of Pin and Pin Functions 1.6.1 320-Pin LFBGA 1.6.2 224-Pin LFBGA 1.6.3 176-Pin LFBGA 1.6.4 176-Pin LFQFP 1.6.5 144-Pin LFQFP 1.6.6 100-Pin LFQFP 2. Electrical Characteristics 2.1 Test Conditions 2.1.1 Maximum and Minimum Values (Max./Min.) 2.1.2 Typical Values (Typ.) 2.2 Absolute Maximum Ratings 2.3 Recommended Operating Conditions 2.4 DC Characteristics 2.4.1 Characteristics of the Input Voltage of the I/O Pins 2.4.2 Characteristics of the Output Voltage of the I/O Pins 2.4.3 Characteristics of the Other I/O Pins 2.4.4 Operating and Standby Currents 2.4.4.1 Operating and Standby Currents for Product Part No. R5K574Nxy4xx (y = A, B, C, D) 2.4.4.2 Operating and Standby Currents for Product Part No. R5K574Nxy4xx (y = E, F) 2.4.4.3 Currents in Deep Software Standby Mode 2.4.4.4 Other Operating Currents 2.4.4.5 Permissible Output Currents 2.4.5 Thermal Characteristics 2.4.5.1 Thermal Resistance Value 2.4.5.2 Supply Currents for the Peripheral Functions 2.4.5.3 Example of Calculation of Ta 2.4.6 VCC Rising and Falling Slopes and Ripple Frequency 2.5 AC Characteristics 2.5.1 Operating Frequency 2.5.2 Clock Timing 2.5.3 Reset Timing 2.5.4 Timing of Return from Low Power Consumption Modes 2.5.5 Control Signal Timing 2.5.6 Bus Timing 2.5.7 Timing of On-Chip Peripheral Modules 2.5.7.1 I/O Port 2.5.7.2 TMR 2.5.7.3 CMTW 2.5.7.4 POEG 2.5.7.5 GPTW 2.5.7.6 RSCI 2.5.7.7 RSPIA 2.5.7.8 XSPI 2.5.7.9 RIICHS 2.5.7.10 RI3C 2.5.7.11 SSIE 2.5.7.12 SD/MMC Host Interface 2.5.7.13 PDC 2.5.7.14 HRPWM 2.5.7.15 CANFD/CANFDG 2.5.7.16 ESWM 2.5.7.17 PDMIF 2.5.7.18 PCIF 2.5.7.19 PIO 2.5.7.20 A/D Converter Trigger 2.5.7.21 CAC 2.6 USB Characteristics 2.6.1 USB Timing 2.6.2 USBHS Timing 2.7 A/D Conversion Characteristics 2.7.1 Analog Input Voltage Range 2.7.2 Common Characteristics of the 16-Bit A/D Converter 2.7.3 SAR Mode Characteristics 2.7.4 Common Characteristics of Oversampling Mode and Hybrid Mode 2.7.5 Oversampling Mode Characteristics 2.7.6 Hybrid Mode Characteristics 2.8 D/A Conversion Characteristics 2.9 Temperature Sensor Characteristics 2.10 Power-on Reset Circuit and Voltage Detection Circuit Characteristics 2.11 Core Voltage Monitoring Reset Characteristics 2.12 Oscillation Stop Detection Timing 2.13 External VDD Timing Characteristics 2.14 Battery Backup Function Characteristics 2.15 MRAM Characteristics 2.15.1 Code MRAM Characteristics 2.15.2 Option-Setting Memory (MRAM Area) Characteristics 2.15.3 Option-Setting Memory (OTP Area with ECC) Characteristics 2.15.4 Option-Setting Memory (OTP Area without ECC) Characteristics 2.15.5 MACI Command Characteristics 2.15.6 W-HUK Zeroization Characteristics 2.15.7 MRAM Magnetic Field Resistance Characteristics 2.15.8 Data MRAM Characteristics 2.16 Boundary Scan 2.17 Usage Note 2.17.1 Connecting VCL Capacitor and Bypass Capacitors Appendix 1. Package Dimensions REVISION HISTORY General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products Notice