Datasheet TPS40210, TPS40211 (Texas Instruments) - 5
| Fabricante | Texas Instruments |
| Descripción | TPS4021x 4.5-V to 52-V Input Current Mode Boost Controller |
| Páginas / Página | 52 / 5 — TPS40210. , TPS40211. www.ti.com. Electrical Characteristics (continued). … |
| Revisión | F |
| Formato / tamaño de archivo | PDF / 1.8 Mb |
| Idioma del documento | Inglés |
TPS40210. , TPS40211. www.ti.com. Electrical Characteristics (continued). PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT. PWM. SOFT-START

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TPS40210 , TPS40211 www.ti.com
SLUS772F – MARCH 2008 – REVISED MARCH 2015
Electrical Characteristics (continued)
TJ = –40°C to 125°C, VDD= 12Vdc, all parameters at zero power dissipation (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM
VDD = 12 V(1) 275 400 tON(min) Minimum pulse width V ns DD = 30 V 90 200 tOFF(min) Minimum off time 170 200 VVLY Valley voltage 1.2 V
SOFT-START
Offset voltage from SS pin to error VSS(ofst) 700 mV amplifier input RSS(chg) Soft-start charge resistance 320 430 600 kΩ RSS(dchg) Soft-start discharge resistance 840 1200 1600
ERROR AMPLIFIER
GBWP Unity gain bandwidth product(1) 1.5 3.0 MHz AOL Open loop gain(1) 60 80 dB Input bias current (current out of FB IIB(FB) 100 300 nA pin) ICOMP(src) Output source current VFB = 0.6 V, VCOMP = 1 V 100 250 μA ICOMP(snk) Output sink current VFB = 1.2 V, VCOMP = 1 V 1.2 2.5 mA
OVERCURRENT PROTECTION
Overcurrent detection threshold (at VISNS(oc) 4.5 ≤ V ISNS pin) DD < 52 V, -40°C ≤ TJ ≤ 125°C 120 150 180 mV DOC Overcurrent duty cycle(1) 2% Overcurrent reset threshold voltage (at VSS(rst) 100 150 350 mV SS pin) TBLNK Leading edge blanking(1) 75 ns
CURRENT SENSE AMPLIFIER
ACS Current sense amplifier gain 4..2 5.6 7.2 V/V IB(ISNS) Input bias current 1 3 μA
DRIVER
IGDRV(src) Gate driver source current VGDRV = 4 V, TJ = 25°C 375 400 mA IGDRV(snk) Gate driver sink current VGDRV = 4 V, TJ = 25°C 330 400
LINEAR REGULATOR
VBP Bypass voltage output 0 mA < IBP < 15 mA 7 8 9 V
DISABLE/ENABLE
VDIS(en) Turn-on voltage 0.7 1.3 V VDIS(hys) Hysteresis voltage 25 130 220 mV RDIS DIS pin pulldown resistance 0.7 1.1 1.5 MΩ Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS40210 TPS40211 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Soft-Start 7.3.2 BP Regulator 7.3.3 Shutdown (DIS/EN Pin) 7.3.4 Minimum On-Time and Off-Time Considerations 7.3.5 Setting the Oscillator Frequency 7.3.6 Synchronizing the Oscillator 7.3.7 Current Sense and Overcurrent 7.3.8 Current Sense and Sub-Harmonic Instability 7.3.9 Current Sense Filtering 7.3.10 Control Loop Considerations 7.3.11 Gate Drive Circuit 7.3.12 TPS40211 7.4 Device Functional Modes 7.4.1 Operation Near Minimum Input Voltage 7.4.2 Operation With DIS/EN Pin 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 12-V to 24-V Nonsynchronous Boost Regulator 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 8.2.2 12-V Input, 700-mA LED Driver, Up to 35-V LED String 8.2.2.1 Design Requirements 8.2.2.2 Detailed Design Procedure 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer 11.1.2 Related Devices 11.2 Documentation Support 11.2.1 Custom Design with WEBENCH Tools 11.2.2 Receiving Notification of Documentation Updates 11.2.3 References 11.3 Related Links 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information