Datasheet Texas Instruments CDC7005RGZ — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CDC7005 |
| Numero de parte | CDC7005RGZ |
Sincronizador de reloj de alto rendimiento, bajo ruido de fase y bajo sesgo que sincroniza el reloj de referencia con VCXO 48-VQFN -40 a 85
Hojas de datos
3.3-V High Performance Clock Synthesizer & Jitter Cleaner datasheet
PDF, 1.1 Mb, Revisión: L, Archivo publicado: jun 4, 2009
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Vista previa (El dispositivo ha sido anunciado pero no está en producción. Las muestras pueden o no estar disponibles) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 48 |
| Package Type | RGZ |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | .9 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | Descargar |
Paramétricos
| Approx. Price (US$) | 10.00 | 1ku |
| Divider Ratio | 1 to 16 |
| Input Level | LVCMOS (REF_CLK) LVPECL (VCXO_CLK) |
| No. of Outputs | 5 |
| Number of Inputs | 1 |
| Operating Temperature Range(C) | -40 to 85 |
| Output Frequency(Max)(MHz) | 800 |
| Output Frequency(Min)(MHz) | 10 |
| Output Level | LVPECL |
| Package Group | VQFN |
| Package Size: mm2:W x L (PKG) | 48VQFN: 49 mm2: 7 x 7(VQFN) |
| Rating | Catalog |
| Special Features | OPAMP for Active Loop Filter Programmable Delay |
| Supply Voltage(Max)(V) | 3.6 |
| Supply Voltage(Min)(V) | 3 |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: CDC7005-EVM
CDC7005 Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: CDC7005QFN-EVM
CDC7005 QFN Package Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: CDCM7005BGA-EVM
CDCM7005 BGA Package Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: CDCM7005QFN-EVM
CDCM7005 QFN Package Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Open Loop Phase-Noise Performance of CDC7005 at Various FrequenciesPDF, 353 Kb, Archivo publicado: dic 17, 2004
This application brief presents phase-noise data taken on Texas Instruments CDC7005 jitter cleaner and synchronizer PLL. The phase noise performance of CDC7005 depends on thephase noise of the reference clock, the voltage-controlled crystal oscillator (VCXO) clock,and the CDC7005 itself. This applications brief shows the phase noise performance of the CDC7005 clock synthesizer at the most popula - Phase Noise (Jitter) Performance of CDC7005 With Different VCXOs (Rev. A)PDF, 1.3 Mb, Revisión: A, Archivo publicado: jul 19, 2005
- Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. B)PDF, 85 Kb, Revisión: B, Archivo publicado: dic 15, 2009
- General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (Rev. A)PDF, 207 Kb, Revisión: A, Archivo publicado: dic 16, 2003
- Basics of the CDC7005 Hold FunctionPDF, 233 Kb, Archivo publicado: abr 13, 2006
The CDC7005 is a high-performance clock synthesizer and jitter cleaner with implemented hold functionality. The hold functionality can be used for fail-safe operation if the reference clock is missing. This application report describes the basis, the advantages, and the limitations of the CDC7005 hold functionality. Additionally, a discrete realization of a simplified external hold function is sho - Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC DevPDF, 627 Kb, Archivo publicado: jun 25, 2004
Texas Instruments has introduced a family of devices suited to meet the demand for high-speed, high-IF sampling ADC devices like the ADS5500 ADC, capable of sampling at 125 MSPS. To realize the full potential of these high performance devices, it is imperative to provide an extremely low phase noise clock source. The CDC7005 clock distribution chip offers a real-world clocking solution to meet the
Linea modelo
Serie: CDC7005 (8)
Clasificación del fabricante
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Single-Loop PLL