Datasheet Texas Instruments 74ALVCH16827DGGRE4 — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALVCH16827
Numero de parte74ALVCH16827DGGRE4
Datasheet Texas Instruments 74ALVCH16827DGGRE4

Memoria intermedia / controlador de 20 bits con salidas de 3 estados 56-TSSOP -40 a 85

Hojas de datos

SN74ALVCH16827 datasheet
PDF, 338 Kb, Revisión: D, Archivo publicado: sept 2, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin56
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingALVCH16827
Width (mm)6.1
Length (mm)14
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

Bits20
F @ Nom Voltage(Max)100 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)-24/24 mA
Package GroupTSSOP
Package Size: mm2:W x L56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyALVC
VCC(Max)3.6 V
VCC(Min)1.65 V
Voltage(Nom)1.8,2.5,2.7,3.3 V
tpd @ Nom Voltage(Max)4.1,3.9,3.4 ns

Plan ecológico

RoHSObediente

Notas de aplicación

  • Timing Differences of 10-pF Versus 50pF Loading
    PDF, 47 Kb, Archivo publicado: nov 1, 1996
    The 'ALVCH16244 is a 16-bit advanced low voltage CMOS (ALVC) unidirectional driver. Typically, data sheet values for tpd, ten, and tdis are characterized under a 50-pF capacitive load with a temperature range of -40?C to 85?C. At times these drivers are used in memory addressing for dual in-line memory modules (DIMM) with a 10-pF load and and temperature range of 0?C to 70?C. This document provide
  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, Archivo publicado: agosto 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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    PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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    PDF, 418 Kb, Archivo publicado: feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
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    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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    PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
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    PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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    PDF, 253 Kb, Archivo publicado: mayo 1, 1996
  • Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
    PDF, 115 Kb, Archivo publicado: dic 1, 1997
    This application report explores the possibilities for migrating to 3.3-V and 2.5-V power supplies and discusses the implications.Customers are successfully using a wide range of low-voltage 3.3-V logic devices. These devices are within Texas Instruments (TI) advanced low-voltage CMOS (ALVC) crossbar technology (CBT) crossbar technology with integrated diode (CBTD) low-voltage crossbar techn
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    PDF, 380 Kb, Archivo publicado: agosto 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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    PDF, 150 Kb, Archivo publicado: oct 1, 1996
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    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
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    PDF, 1.7 Mb, Archivo publicado: oct 1, 1996
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Clasificación del fabricante

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver