Datasheet Texas Instruments ADS4226IRGCR — Ficha de datos

Fabricante	Texas Instruments
Serie	ADS4226
Numero de parte	ADS4226IRGCR

Convertidor analógico a digital (ADC) de doble canal, 12 bits, 160-MSPS 64-VQFN -40 a 85

Hojas de datos

Descargar

PDF, 4.2 Mb, Revisión: D, Archivo publicado: oct 27, 2015

Extracto del documento

Precios

Estado

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Embalaje

Pin	64
Package Type	RGC
Industry STD Term	VQFN
JEDEC Code	S-PQFP-N
Package QTY	2000
Carrier	LARGE T&R
Device Marking	AZ4226
Width (mm)	9
Length (mm)	9
Thickness (mm)	.88
Pitch (mm)	.5
Max Height (mm)	1
Mechanical Data	Descargar

Paramétricos

# Input Channels	2
Analog Input BW	600 MHz
Architecture	Pipeline
DNL(Max)	1.7 +/-LSB
DNL(Typ)	0.5 +/-LSB
ENOB	11.4 Bits
INL(Max)	5 +/-LSB
INL(Typ)	2 +/-LSB
Input Buffer	No
Input Range	2 Vp-p
Interface	DDR LVDS,Parallel CMOS
Operating Temperature Range	-40 to 85 C
Package Group	VQFN
Package Size: mm2:W x L	64VQFN: 81 mm2: 9 x 9(VQFN) PKG
Power Consumption(Typ)	332 mW
Rating	Catalog
Reference Mode	Int
Resolution	12 Bits
SFDR	87 dB
SINAD	70.4 dB
SNR	70.5 dB
Sample Rate(Max)	160 MSPS

Plan ecológico

RoHS

Obediente

Kits de diseño y Módulos de evaluación

Evaluation Modules & Boards: ADS4226EVM
ADS4226 Dual-Channel, 12-Bit, 160-MSPS Analog-to-Digital Converter Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
- Descargar
Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
- Descargar
Evaluation Modules & Boards: TSW1405EVM
Data Capture: Data Converter EVMs With 8 LVDS Lanes up to 1.0Gbps
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
- Descargar

Notas de aplicación

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High-Speed Analog-to-Digital Converter Basics
PDF, 1.1 Mb, Archivo publicado: enero 11, 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
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QFN Layout Guidelines
PDF, 1.3 Mb, Archivo publicado: jul 28, 2006
Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
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CDCE62005 as Clock Solution for High-Speed ADCs
PDF, 805 Kb, Archivo publicado: sept 4, 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
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Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
PDF, 1.2 Mb, Revisión: A, Archivo publicado: jul 19, 2013
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Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
PDF, 2.0 Mb, Revisión: A, Archivo publicado: mayo 22, 2015
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Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
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CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
PDF, 424 Kb, Archivo publicado: jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
Descargar
Principles of Data Acquisition and Conversion (Rev. A)
PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
Descargar
A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015

Linea modelo

Serie: ADS4226 (2)

ADS4226IRGCR ADS4226IRGCT

Clasificación del fabricante

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)