Datasheet Texas Instruments ADS4226 — Ficha de datos

FabricanteTexas Instruments
SerieADS4226
Datasheet Texas Instruments ADS4226

Convertidor analógico a digital (ADC) de doble canal, 12 bits y 160 MSPS

Hojas de datos

ADS42xx Dual-Channel, 14-/12-Bit, 160/125/65 MSPS Ultralow-Power ADC datasheet
PDF, 4.2 Mb, Revisión: D, Archivo publicado: oct 27, 2015
Extracto del documento

Precios

Estado

ADS4226IRGCRADS4226IRGCT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

ADS4226IRGCRADS4226IRGCT
N12
Pin6464
Package TypeRGCRGC
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2000250
CarrierLARGE T&RSMALL T&R
Device MarkingAZ4226AZ4226
Width (mm)99
Length (mm)99
Thickness (mm).88.88
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsADS4226IRGCR
ADS4226IRGCR
ADS4226IRGCT
ADS4226IRGCT
# Input Channels22
Analog Input BW, MHz600600
ArchitecturePipelinePipeline
DNL(Max), +/-LSB1.71.7
DNL(Typ), +/-LSB0.50.5
ENOB, Bits11.411.4
INL(Max), +/-LSB55
INL(Typ), +/-LSB22
Input BufferNoNo
Input Range, Vp-p22
InterfaceDDR LVDS,Parallel CMOSDDR LVDS,Parallel CMOS
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW332332
RatingCatalogCatalog
Reference ModeIntInt
Resolution, Bits1212
SFDR, dB8787
SINAD, dB70.470.4
SNR, dB70.570.5
Sample Rate(Max), MSPS160160

Plan ecológico

ADS4226IRGCRADS4226IRGCT
RoHSObedienteObediente

Notas de aplicación

  • High-Speed Analog-to-Digital Converter Basics
    PDF, 1.1 Mb, Archivo publicado: enero 11, 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Archivo publicado: jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revisión: A, Archivo publicado: jul 19, 2013
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revisión: A, Archivo publicado: mayo 22, 2015
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015

Linea modelo

Serie: ADS4226 (2)

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)